MFk 1173 src/dps8/dps8_eis.c word18 MFk = e -> MF [k - 1]; MFk 1175 src/dps8/dps8_eis.c if (MFk & MFkID) MFk 1330 src/dps8/dps8_eis.c word18 MFk = e -> MF [k - 1]; MFk 1403 src/dps8/dps8_eis.c if (MFk & MFkAR) MFk 1431 src/dps8/dps8_eis.c if (MFk & MFkRL) MFk 1466 src/dps8/dps8_eis.c word36 r = getMFReg36 (cpup, MFk & 017, allowDU, true, mod_fault); // allow du based on instruction, allow n,ic MFk 1468 src/dps8/dps8_eis.c if ((MFk & 017) == 4) // reg == IC ? MFk 1650 src/dps8/dps8_eis.c word18 MFk = e->MF[k-1]; MFk 1660 src/dps8/dps8_eis.c if (MFk & MFkAR) MFk 1705 src/dps8/dps8_eis.c if (MFk & MFkRL) MFk 1715 src/dps8/dps8_eis.c word36 r = getMFReg36(cpup, MFk & 017, false, true, mod_fault); // disallow du, allow n, ic MFk 1716 src/dps8/dps8_eis.c if ((MFk & 017) == 4) // reg == IC ? MFk 1833 src/dps8/dps8_eis.c word18 MFk = e->MF[k-1]; MFk 1846 src/dps8/dps8_eis.c if (MFk & MFkAR) MFk 1872 src/dps8/dps8_eis.c if (MFk & MFkRL) MFk 1895 src/dps8/dps8_eis.c word36 r = getMFReg36(cpup, MFk & 017, false, true, mod_fault); // disallow du, allow n,ic MFk 1896 src/dps8/dps8_eis.c if ((MFk & 017) == 4) // reg == IC ?