switches 162 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.FLT_BASE); switches 164 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.cpu_num); switches 166 src/dps8/dps8_cpu.c (unsigned long long)cpus[cpu_unit_idx].switches.data_switches); switches 168 src/dps8/dps8_cpu.c PBI_64((unsigned long long)cpus[cpu_unit_idx].switches.data_switches)); switches 172 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.addr_switches); switches 174 src/dps8/dps8_cpu.c PBI_32(cpus[cpu_unit_idx].switches.addr_switches)); switches 180 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.enable [i]); switches 182 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.init_enable [i]); switches 184 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.assignment [i]); switches 186 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.interlace [i]); switches 188 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.store_size [i]); switches 191 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.procMode == \ switches 192 src/dps8/dps8_cpu.c procModeMultics ? "Multics" : cpus[cpu_unit_idx].switches.procMode == procModeGCOS ? "GCOS" : "???", switches 193 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.procMode); switches 195 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable_cache ? "Enabled" : "Disabled"); switches 197 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.sdwam_enable ? "Enabled" : "Disabled"); switches 199 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.ptwam_enable ? "Enabled" : "Disabled"); switches 492 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.FLT_BASE = (uint) v; switches 494 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.cpu_num = (uint) v; switches 496 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.data_switches = (word36) v; switches 510 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.data_switches = d; switches 513 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.addr_switches = (word18) v; switches 515 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.procMode = v ? procModeMultics : procModeGCOS; switches 526 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [port_num] = (uint) v; switches 528 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [port_num] = (uint) v; switches 530 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [port_num] = (uint) v; switches 532 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [port_num] = (uint) v; switches 559 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [port_num] = (uint) v; switches 562 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable_cache = (uint) v ? true : false; switches 564 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.sdwam_enable = (uint) v ? true : false; switches 566 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.ptwam_enable = (uint) v ? true : false; switches 617 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].isolts_switches_save = cpus[cpu_unit_idx].switches; switches 620 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.data_switches = 00000030714000; switches 621 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.addr_switches = 0100150; switches 624 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [0] = 0; switches 625 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [0] = false; switches 626 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [0] = false; switches 627 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [0] = false; switches 628 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [0] = store_sz; switches 630 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [1] = 0; switches 631 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [1] = false; switches 632 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [1] = true; switches 633 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [1] = false; switches 634 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [1] = store_sz; switches 636 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [2] = 0; switches 637 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [2] = false; switches 638 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [2] = false; switches 639 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [2] = false; switches 640 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [2] = store_sz; switches 642 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [3] = 0; switches 643 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [3] = false; switches 644 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [3] = false; switches 645 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [3] = false; switches 646 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [3] = store_sz; switches 649 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [4] = 0; switches 650 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [4] = false; switches 651 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [4] = false; switches 652 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [4] = false; switches 653 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [4] = 3; switches 655 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [5] = 0; switches 656 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [5] = false; switches 657 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [5] = false; switches 658 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [5] = false; switches 659 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [5] = 3; switches 661 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [6] = 0; switches 662 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [6] = false; switches 663 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [6] = false; switches 664 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [6] = false; switches 665 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [6] = 3; switches 667 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [7] = 0; switches 668 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [7] = false; switches 669 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [7] = false; switches 670 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [7] = false; switches 671 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [7] = 3; switches 675 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [1] = true; switches 679 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches = cpus[cpu_unit_idx].isolts_switches_save; switches 830 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = port_num; switches 831 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; switches 832 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 2; switches 833 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 1; switches 834 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 1; switches 837 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = 0; switches 838 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; switches 839 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 0; switches 840 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 0; switches 841 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 0; switches 855 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = port_num; switches 856 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; switches 857 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 7; switches 858 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 1; switches 859 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 1; switches 862 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = 0; switches 863 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; switches 864 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 0; switches 865 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 0; switches 866 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 0; switches 959 src/dps8/dps8_cpu.c cpu.cu.SD_ON = cpu.switches.sdwam_enable ? 1 : 0; switches 960 src/dps8/dps8_cpu.c cpu.cu.PT_ON = cpu.switches.ptwam_enable ? 1 : 0; switches 1294 src/dps8/dps8_cpu.c if (! cpu.switches.enable [port_num]) switches 1306 src/dps8/dps8_cpu.c uint store_size = cpu.switches.store_size [port_num]; switches 1336 src/dps8/dps8_cpu.c uint base_addr_wds = sz_wds * cpu.switches.assignment[port_num]; switches 1408 src/dps8/dps8_cpu.c if (sscanf (buffer, "sn: %u", & cpu.switches.serno) == 1) switches 1412 src/dps8/dps8_cpu.c sim_msg ("%s CPU serial number: %u\n", sim_name, cpu.switches.serno); switches 1420 src/dps8/dps8_cpu.c cpus[cpun].switches.serno = sn; switches 1424 src/dps8/dps8_cpu.c sim_name, cpun, cpus[cpun].switches.serno); switches 1542 src/dps8/dps8_cpu.c cpus [0].switches.FLT_BASE = 2; // Some of the UnitTests assume this switches 1815 src/dps8/dps8_cpu.c cpu.cu.IWB = cpu.switches.data_switches; switches 3150 src/dps8/dps8_cpu.c uint fltAddress = (cpu.switches.FLT_BASE << 5) & 07740; switches 4612 src/dps8/dps8_cpu.c putbits36_3 (& rsw2, 33, cpus[cpuNo].switches.cpu_num & 07LL); switches 4622 src/dps8/dps8_cpu.c (void)sprintf (serial, "%-11u", cpus[cpuNo].switches.serno); switches 1596 src/dps8/dps8_cpu.h switches_t switches; switches 422 src/dps8/dps8_ins.c putbits36_3 (& words[2], 27, (word3) cpu.switches.cpu_num); switches 3560 src/dps8/dps8_ins.c if (cpu.switches.procMode == procModeGCOS) switches 8169 src/dps8/dps8_ins.c cpu.rA = cpu.switches.data_switches; switches 8200 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [0] & 07LL) switches 8202 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [0] & 01LL) switches 8204 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [0] & 01LL) switches 8206 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] ? 1LL:0LL) switches 8208 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [0] & 07LL) switches 8211 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [1] & 07LL) switches 8213 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [1] & 01LL) switches 8215 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [1] & 01LL) switches 8217 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] ? 1LL:0LL) switches 8219 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [1] & 07LL) switches 8222 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [2] & 07LL) switches 8224 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [2] & 01LL) switches 8226 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [2] & 01LL) switches 8228 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] ? 1LL:0LL) switches 8230 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [2] & 07LL) switches 8233 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [3] & 07LL) switches 8235 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [3] & 01LL) switches 8237 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [3] & 01LL) switches 8239 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] ? 1LL:0LL) switches 8241 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [3] & 07LL) switches 8314 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[0] == 2 ? switches 8316 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[1] == 2 ? switches 8318 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[2] == 2 ? switches 8320 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[3] == 2 ? switches 8332 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.FLT_BASE & 0177LL) switches 8357 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.enable_cache ? 1 : 0) switches 8362 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.procMode) /* 0b1 DPS8M */ switches 8364 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.procMode & 1U) switches 8386 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.cpu_num & 07LL) switches 8423 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [4] & 07LL) switches 8425 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [4] & 01LL) switches 8427 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [4] & 01LL) switches 8429 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] ? 1LL:0LL) switches 8431 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [4] & 07LL) switches 8434 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [5] & 07LL) switches 8436 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [5] & 01LL) switches 8438 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [5] & 01LL) switches 8440 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] ? 1LL:0LL) switches 8442 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [5] & 07LL) switches 8445 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [6] & 07LL) switches 8447 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [6] & 01LL) switches 8449 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [6] & 01LL) switches 8451 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] ? 1LL:0LL) switches 8453 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [6] & 07LL) switches 8456 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.assignment [7] & 07LL) switches 8458 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.enable [7] & 01LL) switches 8460 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [7] & 01LL) switches 8462 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] ? 1LL:0LL) switches 8464 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.store_size [7] & 07LL) switches 8485 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] == 2 ? switches 8487 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] == 2 ? switches 8489 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] == 2 ? switches 8491 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] == 2 ? switches 8494 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] == 2 ? switches 8496 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] == 2 ? switches 8498 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] == 2 ? switches 8500 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] == 2 ? switches 434 src/dps8/panelScraper.c SETL (bank_a, 27+3, (word3) cpu.switches.cpu_num, 3); switches 1400 src/dps8/panelScraper.c SETS (cpu.switches.data_switches, port_data, 0, 36); switches 1404 src/dps8/panelScraper.c SETS (cpu.switches.addr_switches, port_data, 0, 18); switches 9651 src/simh/scp.c t_stat sim_exp_set (EXPECT *exp, const char *match, int32 cnt, uint32 after, int32 switches, const char *act) switches 9662 src/simh/scp.c if (switches & EXP_TYP_REGEX) { switches 9667 src/simh/scp.c if (switches & EXP_TYP_REGEX_I) { switches 9680 src/simh/scp.c (exp->rules[i].switches & EXP_TYP_PERSIST)) switches 9706 src/simh/scp.c ep->switches = switches; /* set switches */ switches 9713 src/simh/scp.c if (switches & EXP_TYP_REGEX) { switches 9751 src/simh/scp.c size_t compare_size = (exp->rules[i].switches & EXP_TYP_REGEX) ? MAX(10 * strlen(ep->match_pattern), 1024) : exp->rules[i].size; switches 9767 src/simh/scp.c if (ep->switches & EXP_TYP_PERSIST) switches 9769 src/simh/scp.c if (ep->switches & EXP_TYP_CLEARALL) switches 9771 src/simh/scp.c if (ep->switches & EXP_TYP_REGEX) switches 9773 src/simh/scp.c if (ep->switches & EXP_TYP_REGEX_I) switches 9852 src/simh/scp.c if (ep->switches & EXP_TYP_REGEX) { switches 9920 src/simh/scp.c int32 switches = ep->switches; switches 9928 src/simh/scp.c if (ep->switches & EXP_TYP_CLEARALL) /* Clear-all expect rule? */ switches 9931 src/simh/scp.c if (!(ep->switches & EXP_TYP_PERSIST)) /* One shot expect rule? */ switches 9935 src/simh/scp.c (switches & EXP_TYP_TIME) ? switches 187 src/simh/scp.h t_stat sim_exp_set (EXPECT *exp, const char *match, int32 cnt, uint32 after, int32 switches, const char *act); switches 623 src/simh/scp.h const char *switches, switches 630 src/simh/sim_defs.h int32 switches; /* flags */