rega 1550 src/dps8/dps8_scu.c uint UNUSED cpu_port_num, word36 rega) rega 1557 src/dps8/dps8_scu.c if (getbits36_1 (rega, 35)) rega 1561 src/dps8/dps8_scu.c if (getbits36_1 (rega, i)) rega 1573 src/dps8/dps8_scu.c if (getbits36_1 (rega, i)) rega 1582 src/dps8/dps8_scu.c rega 1586 src/dps8/dps8_scu.c rega 1598 src/dps8/dps8_scu.c rega 1645 src/dps8/dps8_scu.c word36 rega, word36 regq) rega 1698 src/dps8/dps8_scu.c scu_unit_idx, rega, regq); rega 1705 src/dps8/dps8_scu.c word9 mask = ((maskab ? regq : rega) >> 27) & 0777; rega 1740 src/dps8/dps8_scu.c up -> lower_store_size = (rega >> 24) & 07; rega 1742 src/dps8/dps8_scu.c up -> nea = (rega >> 6) & 0377; rega 1743 src/dps8/dps8_scu.c up -> onl = (rega >> 20) & 017; rega 1744 src/dps8/dps8_scu.c up -> interlace = (rega >> 5) & 1; rega 1745 src/dps8/dps8_scu.c up -> lwr = (rega >> 4) & 1; rega 1746 src/dps8/dps8_scu.c up -> port_enable [0] = (rega >> 3) & 01; rega 1747 src/dps8/dps8_scu.c up -> port_enable [1] = (rega >> 2) & 01; rega 1748 src/dps8/dps8_scu.c up -> port_enable [2] = (rega >> 1) & 01; rega 1749 src/dps8/dps8_scu.c up -> port_enable [3] = (rega >> 0) & 01; rega 1778 src/dps8/dps8_scu.c port_num, rega, regq); rega 1821 src/dps8/dps8_scu.c ((word32) getbits36_16(rega, 0) << 16); rega 1861 src/dps8/dps8_scu.c getbits36_1 (rega, i) ? 1 : 0; rega 1917 src/dps8/dps8_scu.c word36 * rega, word36 * regq) rega 1952 src/dps8/dps8_scu.c * rega = 0; rega 2065 src/dps8/dps8_scu.c * rega = a; rega 2084 src/dps8/dps8_scu.c scu_unit_idx, * rega, * regq); rega 2106 src/dps8/dps8_scu.c * rega = 0; rega 2107 src/dps8/dps8_scu.c putbits36 (rega, 0, 16, (mask_contents >> 16) & MASK16); rega 2108 src/dps8/dps8_scu.c putbits36 (rega, 32, 1, up -> port_enable [0]); rega 2109 src/dps8/dps8_scu.c putbits36 (rega, 33, 1, up -> port_enable [1]); rega 2110 src/dps8/dps8_scu.c putbits36 (rega, 34, 1, up -> port_enable [2]); rega 2111 src/dps8/dps8_scu.c putbits36 (rega, 35, 1, up -> port_enable [3]); rega 2114 src/dps8/dps8_scu.c putbits36 (rega, 0, 16, (mask_contents >> 0) & MASK16); rega 2143 src/dps8/dps8_scu.c putbits36_1 (rega, i, cell); rega 2216 src/dps8/dps8_scu.c * rega = 0; rega 2535 src/dps8/dps8_scu.c t_stat scu_rmcm (uint scu_unit_idx, uint cpu_unit_udx, word36 * rega, rega 2544 src/dps8/dps8_scu.c * rega = 0; rega 2610 src/dps8/dps8_scu.c * rega = 0; //-V1048 rega 2611 src/dps8/dps8_scu.c putbits36_16 (rega, 0, (mask_contents >> 16) & MASK16); rega 2612 src/dps8/dps8_scu.c putbits36_1 (rega, 32, (word1) up -> port_enable [0]); rega 2613 src/dps8/dps8_scu.c putbits36_1 (rega, 33, (word1) up -> port_enable [1]); rega 2614 src/dps8/dps8_scu.c putbits36_1 (rega, 34, (word1) up -> port_enable [2]); rega 2615 src/dps8/dps8_scu.c putbits36_1 (rega, 35, (word1) up -> port_enable [3]); rega 2629 src/dps8/dps8_scu.c * rega, * regq); rega 2634 src/dps8/dps8_scu.c t_stat scu_smcm (uint scu_unit_idx, uint cpu_unit_udx, word36 rega, word36 regq) rega 2641 src/dps8/dps8_scu.c scu_unit_idx, cpu_unit_udx, rega, regq); rega 2685 src/dps8/dps8_scu.c ((uint) getbits36_16(rega, 0) << 16) | rega 2703 src/dps8/dps8_scu.c scu [scu_unit_idx].port_enable [0] = (uint) getbits36_1 (rega, 32); rega 2704 src/dps8/dps8_scu.c scu [scu_unit_idx].port_enable [1] = (uint) getbits36_1 (rega, 33); rega 2705 src/dps8/dps8_scu.c scu [scu_unit_idx].port_enable [2] = (uint) getbits36_1 (rega, 34); rega 2706 src/dps8/dps8_scu.c scu [scu_unit_idx].port_enable [3] = (uint) getbits36_1 (rega, 35); rega 95 src/dps8/dps8_scu.h word36 rega, word36 regq); rega 96 src/dps8/dps8_scu.h t_stat scu_smic (cpu_state_t * cpup, uint scu_unit_idx, uint UNUSED cpu_unit_idx, uint cpu_port_num, word36 rega); rega 97 src/dps8/dps8_scu.h t_stat scu_rscr (cpu_state_t * cpup, uint scu_unit_idx, uint cpu_unit_idx, word18 addr, word36 * rega, word36 * regq); rega 99 src/dps8/dps8_scu.h t_stat scu_rmcm (uint scu_unit_idx, uint cpu_unit_idx, word36 * rega, word36 * regq); rega 100 src/dps8/dps8_scu.h t_stat scu_smcm (uint scu_unit_idx, uint cpu_unit_idx, word36 rega, word36 regq);