mode_reg          688 src/dps8/dps8_scu.c     sim_printf("mode_reg: %06o\r\n",       scup -> mode_reg);
mode_reg         1195 src/dps8/dps8_scu.c       if (((scu [scu_unit_idx].mode_reg >> (16 - 2 * f)) & 3) == 2)
mode_reg         1227 src/dps8/dps8_scu.c     word18 mr = scu_unit_idx < 0 ? 0 : scu [scu_unit_idx].mode_reg;
mode_reg         1252 src/dps8/dps8_scu.c     word18 mr = scu_unit_idx < 0 ? 0 : scu [scu_unit_idx].mode_reg;
mode_reg         1262 src/dps8/dps8_scu.c     word18 mr = scu_unit_idx < N_SCU_UNITS_MAX ? scu [scu_unit_idx].mode_reg : 0;
mode_reg         1795 src/dps8/dps8_scu.c             scu [scu_unit_idx].mode_reg = getbits36_18 (regq, 54 - 36);
mode_reg         2082 src/dps8/dps8_scu.c             putbits36_18 (regq, 54 - 36, scu [scu_unit_idx].mode_reg);
mode_reg         2652 src/dps8/dps8_scu.c         scu [u].mode_reg     = 0;   // used by T&D
mode_reg           82 src/dps8/dps8_scu.h     word18 mode_reg;