port_num 576 src/dps8/dps8_cable.c uint ctlr_unit_idx, uint port_num, port_num 635 src/dps8/dps8_cable.c p->port_num = port_num; port_num 1573 src/dps8/dps8_cable.c u, c, p->ctlr_unit_idx, p->port_num, ctlr_type_strs[p->ctlr_type], port_num 150 src/dps8/dps8_cable.h uint port_num; // port# port_num 471 src/dps8/dps8_cpu.c static int port_num = 0; port_num 523 src/dps8/dps8_cpu.c port_num = (int) v; port_num 526 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.assignment [port_num] = (uint) v; port_num 528 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [port_num] = (uint) v; port_num 530 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.enable [port_num] = (uint) v; port_num 532 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [port_num] = (uint) v; port_num 559 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.store_size [port_num] = (uint) v; port_num 829 src/dps8/dps8_cpu.c for (uint port_num = 0; port_num < N_DPS8M_CPU_PORTS; port_num ++) { port_num 830 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = port_num; port_num 831 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; port_num 832 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 2; port_num 833 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 1; port_num 834 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 1; port_num 836 src/dps8/dps8_cpu.c for (uint port_num = N_DPS8M_CPU_PORTS; port_num < N_L68_CPU_PORTS; port_num ++) { port_num 837 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = 0; port_num 838 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; port_num 839 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 0; port_num 840 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 0; port_num 841 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 0; port_num 854 src/dps8/dps8_cpu.c for (uint port_num = 0; port_num < N_DPS8M_CPU_PORTS; port_num ++) { port_num 855 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = port_num; port_num 856 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; port_num 857 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 7; port_num 858 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 1; port_num 859 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 1; port_num 861 src/dps8/dps8_cpu.c for (uint port_num = N_DPS8M_CPU_PORTS; port_num < N_L68_CPU_PORTS; port_num ++) { port_num 862 src/dps8/dps8_cpu.c cpun->switches.assignment[port_num] = 0; port_num 863 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; port_num 864 src/dps8/dps8_cpu.c cpun->switches.store_size[port_num] = 0; port_num 865 src/dps8/dps8_cpu.c cpun->switches.enable[port_num] = 0; port_num 866 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 0; port_num 1291 src/dps8/dps8_cpu.c for (int port_num = 0; port_num < (cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS); port_num ++) port_num 1294 src/dps8/dps8_cpu.c if (! cpu.switches.enable [port_num]) port_num 1300 src/dps8/dps8_cpu.c if (! cables->cpu_to_scu[current_running_cpu_idx][port_num].in_use) port_num 1306 src/dps8/dps8_cpu.c uint store_size = cpu.switches.store_size [port_num]; port_num 1336 src/dps8/dps8_cpu.c uint base_addr_wds = sz_wds * cpu.switches.assignment[port_num]; port_num 1340 src/dps8/dps8_cpu.c cpu.sc_num_banks[port_num] = num_banks; port_num 1356 src/dps8/dps8_cpu.c addr_bks, addr_bks, cpu.sc_addr_map [addr_bks], port_num); port_num 1361 src/dps8/dps8_cpu.c cpu.sc_addr_map[addr_bks] = (int)((int)port_num * (int)ZONE_SZ + (int)pg * (int)SCBANK_SZ); port_num 1362 src/dps8/dps8_cpu.c cpu.sc_scu_map[addr_bks] = port_num; port_num 1369 src/dps8/dps8_cpu.c port_num, addr_bks, addr_bks, N_SCBANKS, N_SCBANKS); port_num 1132 src/dps8/dps8_iom.c static uint port_num = 0; port_num 1217 src/dps8/dps8_iom.c port_num = (uint) v; port_num 1223 src/dps8/dps8_iom.c p -> configSwPortAddress[port_num] = (uint) v; port_num 1229 src/dps8/dps8_iom.c p -> configSwPortInterface[port_num] = (uint) v; port_num 1235 src/dps8/dps8_iom.c p -> configSwPortEnable[port_num] = (uint) v; port_num 1241 src/dps8/dps8_iom.c p -> configSwPortSysinitEnable[port_num] = (uint) v; port_num 1247 src/dps8/dps8_iom.c p -> configSwPortHalfsize[port_num] = (uint) v; port_num 1253 src/dps8/dps8_iom.c p -> configSwPortStoresize[port_num] = (uint) v; port_num 1559 src/dps8/dps8_iom.c for (int port_num = 0; port_num < N_SCU_PORTS; port_num ++) port_num 1561 src/dps8/dps8_iom.c if (! cables->iom_to_scu[iom_unit_idx][port_num].in_use) port_num 1563 src/dps8/dps8_iom.c uint scu_unit_idx = cables->iom_to_scu[iom_unit_idx][port_num].scu_unit_idx; port_num 1138 src/dps8/dps8_scu.c for (uint port_num = 0; port_num < N_SCU_PORTS; port_num ++) port_num 1140 src/dps8/dps8_scu.c struct ports * portp = & scu [scu_unit_idx].ports [port_num]; port_num 1731 src/dps8/dps8_scu.c uint port_num = (addr >> 6) & 07; port_num 1734 src/dps8/dps8_scu.c port_num, rega, regq); port_num 1745 src/dps8/dps8_scu.c if (scu [scu_unit_idx ].mask_assignment [p] == port_num) port_num 1758 src/dps8/dps8_scu.c __func__, port_num); port_num 1770 src/dps8/dps8_scu.c __func__, port_num); port_num 1792 src/dps8/dps8_scu.c scu_unit_idx, port_num, mask_num, port_num 2046 src/dps8/dps8_scu.c uint port_num = (addr >> 6) & MASK3; port_num 2052 src/dps8/dps8_scu.c if (up -> mask_assignment [0] == port_num) port_num 2056 src/dps8/dps8_scu.c else if (up -> mask_assignment [1] == port_num) port_num 2081 src/dps8/dps8_scu.c scu_unit_idx, port_num, up -> mask_assignment [0],