l68_mode           21 src/dps8/doAppendCycleInstructionFetch.h   do { if (cpu.tweaks.l68_mode) cpu.cu.APUCycleBits |= 04000; } while (0)
l68_mode          118 src/dps8/dps8.h # define L68_(x) if (cpu.tweaks.l68_mode) { x }
l68_mode          119 src/dps8/dps8.h # define DPS8M_(x) if (! cpu.tweaks.l68_mode) { x }
l68_mode          353 src/dps8/dps8_append.c   if (cpu.tweaks.l68_mode) { // L68
l68_mode          386 src/dps8/dps8_append.c   if (! cpu.tweaks.l68_mode) { // DPS8M
l68_mode          616 src/dps8/dps8_append.c     if (cpu.tweaks.l68_mode) { // L68
l68_mode          658 src/dps8/dps8_append.c     if (! cpu.tweaks.l68_mode) { // DPS8M
l68_mode          701 src/dps8/dps8_append.c     if (cpu.tweaks.l68_mode) { // L68
l68_mode          850 src/dps8/dps8_append.c     if (cpu.tweaks.l68_mode) { // L68
l68_mode          203 src/dps8/dps8_cpu.c     for (int i = 0; i < (cpus[cpu_unit_idx].tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS); i ++)
l68_mode          263 src/dps8/dps8_cpu.c              cpus[cpu_unit_idx].tweaks.l68_mode, cpus[cpu_unit_idx].tweaks.l68_mode ? "6180" : "DPS8/M");
l68_mode          542 src/dps8/dps8_cpu.c           if ((! cpus[cpu_unit_idx].tweaks.l68_mode) && (int) v > 3) {
l68_mode          558 src/dps8/dps8_cpu.c             if (cpus[cpu_unit_idx].tweaks.l68_mode) {
l68_mode          636 src/dps8/dps8_cpu.c               if (cpus[cpu_unit_idx].tweaks.l68_mode) // L68
l68_mode          670 src/dps8/dps8_cpu.c               if (cpus[cpu_unit_idx].tweaks.l68_mode) { // L68
l68_mode          731 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.l68_mode = v;
l68_mode          869 src/dps8/dps8_cpu.c   cpun->tweaks.l68_mode = 1;
l68_mode          894 src/dps8/dps8_cpu.c   cpun->tweaks.l68_mode = 0;
l68_mode         1345 src/dps8/dps8_cpu.c     int n_ports = cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS;
l68_mode         1354 src/dps8/dps8_cpu.c         uint sz_wds = cpu.tweaks.l68_mode ? l68_store_table [store_size] :
l68_mode         1649 src/dps8/dps8_cpu.c     int n_ports = cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS;
l68_mode         1655 src/dps8/dps8_cpu.c         uint sz_wds = cpu.tweaks.l68_mode ? l68_store_table [store_size] :
l68_mode         1685 src/dps8/dps8_cpu.c     for (int port_num = 0; port_num < (cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS); port_num ++)
l68_mode         1723 src/dps8/dps8_cpu.c           cpu.tweaks.l68_mode ?
l68_mode         2510 src/dps8/dps8_cpu.c         ! cpu.tweaks.l68_mode &&
l68_mode         3468 src/dps8/dps8_cpu.c               if (cpu.tweaks.l68_mode)
l68_mode         3912 src/dps8/dps8_cpu.c                   ! cpu.tweaks.l68_mode)
l68_mode         4953 src/dps8/dps8_cpu.c     add_history (cpu.tweaks.l68_mode ? L68_APU_HIST_REG : DPS8M_APU_HIST_REG, w0, w1);
l68_mode          754 src/dps8/dps8_cpu.h     bool l68_mode;        // False: DPS8/M; True: 6180
l68_mode         1536 src/dps8/dps8_cpu.h #define N_MODEL_WAM_ENTRIES (cpu.tweaks.l68_mode ? N_L68_WAM_ENTRIES : N_DPS8M_WAM_ENTRIES)
l68_mode          360 src/dps8/dps8_faults.c     return cpu.tweaks.l68_mode ? 0 : cpu.neaPort;
l68_mode          541 src/dps8/dps8_faults.c     cpu.l68OddFault = cpu.tweaks.l68_mode && cpu.cycle == EXEC_cycle &&
l68_mode         1001 src/dps8/dps8_faults.c     if (cpu.tweaks.l68_mode)
l68_mode         1009 src/dps8/dps8_faults.c     if (cpu.tweaks.l68_mode)
l68_mode         1110 src/dps8/dps8_faults.c      if (cpu.tweaks.l68_mode) {  // L68
l68_mode         1473 src/dps8/dps8_hw_consts.h # define N_MODEL_HIST_SIZE (cpu.tweaks.l68_mode ? N_L68_HIST_SIZE : N_DPS8M_HIST_SIZE)
l68_mode          297 src/dps8/dps8_ins.c     if (cpu.tweaks.l68_mode)
l68_mode         1240 src/dps8/dps8_ins.c         if (cpu.tweaks.l68_mode)
l68_mode         1244 src/dps8/dps8_ins.c         if (cpu.tweaks.l68_mode)
l68_mode         2234 src/dps8/dps8_ins.c     if (cpu.tweaks.l68_mode)
l68_mode         2490 src/dps8/dps8_ins.c     if (cpu.tweaks.l68_mode) { // L68
l68_mode         3349 src/dps8/dps8_ins.c             if (cpu.tweaks.l68_mode)
l68_mode         7231 src/dps8/dps8_ins.c             if (cpu.tweaks.l68_mode)
l68_mode         7648 src/dps8/dps8_ins.c                   if (! cpu.tweaks.l68_mode) // DPS8M
l68_mode         7741 src/dps8/dps8_ins.c           if (cpu.tweaks.l68_mode) {
l68_mode         7759 src/dps8/dps8_ins.c           if (cpu.tweaks.l68_mode) {
l68_mode         7787 src/dps8/dps8_ins.c           if (cpu.tweaks.l68_mode) {
l68_mode         7802 src/dps8/dps8_ins.c           if (cpu.tweaks.l68_mode) {
l68_mode         7845 src/dps8/dps8_ins.c                     uint reg = cpu.tweaks.l68_mode ? L68_APU_HIST_REG : DPS8M_APU_HIST_REG;
l68_mode         7870 src/dps8/dps8_ins.c                     if (! cpu.tweaks.l68_mode ||
l68_mode         7899 src/dps8/dps8_ins.c                     uint reg = cpu.tweaks.l68_mode ? L68_DU_HIST_REG : DPS8M_EAPU_HIST_REG;
l68_mode         7921 src/dps8/dps8_ins.c                     uint reg = cpu.tweaks.l68_mode ? L68_OU_HIST_REG : DPS8M_DU_OU_HIST_REG;
l68_mode         8134 src/dps8/dps8_ins.c                 if (cpu.tweaks.l68_mode || cpu.cu.PT_ON) // only clear when enabled
l68_mode         8181 src/dps8/dps8_ins.c                 if (cpu.tweaks.l68_mode || cpu.cu.SD_ON) // only clear when enabled
l68_mode         8334 src/dps8/dps8_ins.c             if (! cpu.tweaks.l68_mode) {
l68_mode         8505 src/dps8/dps8_ins.c                   if (cpu.tweaks.l68_mode)
l68_mode         8526 src/dps8/dps8_ins.c                   if (cpu.tweaks.l68_mode)
l68_mode         8576 src/dps8/dps8_ins.c                   if (!cpu.tweaks.l68_mode) { // DPS8M
l68_mode         10045 src/dps8/dps8_ins.c     int n_ports = cpu.tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS;
l68_mode         10052 src/dps8/dps8_ins.c         uint sz_wds = cpu.tweaks.l68_mode ? l68_store_table [store_size] :
l68_mode          455 src/dps8/dps8_math.c     return (! cpu.tweaks.l68_mode) && (!! cpu.options.hex_mode_installed) &&  (!! cpu.MR.hexfp) && (!! TST_I_HEX);