ihr               261 src/dps8/doAppendCycleABSA.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               319 src/dps8/doAppendCycleAPUDataRMW.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               277 src/dps8/doAppendCycleAPUDataRead.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               279 src/dps8/doAppendCycleAPUDataStore.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               388 src/dps8/doAppendCycleIndirectWordFetch.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               521 src/dps8/doAppendCycleInstructionFetch.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               317 src/dps8/doAppendCycleOperandRMW.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               634 src/dps8/doAppendCycleOperandRead.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               277 src/dps8/doAppendCycleOperandStore.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               314 src/dps8/doAppendCycleRTCDOperandFetch.h   if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               266 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               312 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               454 src/dps8/dps8_append.c       if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               517 src/dps8/dps8_append.c       if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               813 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               952 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr               977 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr              1874 src/dps8/dps8_append.c     L68_ (if (cpu.MR_cache.emr && cpu.MR_cache.ihr)
ihr              4293 src/dps8/dps8_cpu.c     if (! cpu.MR_cache.ihr)
ihr              4386 src/dps8/dps8_cpu.c     if (! cpu.MR_cache.ihr)
ihr              4451 src/dps8/dps8_cpu.c             cpu.MR.ihr = 0;
ihr               461 src/dps8/dps8_cpu.h     word1 ihr;      //  i       k           30 Enable HR
ihr               635 src/dps8/dps8_faults.c           cpu.MR.ihr = 0;
ihr               658 src/dps8/dps8_faults.c               cpu.MR.ihr = 0;
ihr               665 src/dps8/dps8_faults.c           cpu.MR.ihr = 0;
ihr               816 src/dps8/dps8_faults.c         cpu.MR.ihr = 0;
ihr              1466 src/dps8/dps8_ins.c           cpu.MR.ihr = 0;
ihr              7479 src/dps8/dps8_ins.c                   cpu.MR.ihr = getbits36_1 (cpu.CY, 30);
ihr              7704 src/dps8/dps8_ins.c                     putbits36_1 (& cpu.Ypair[0], 30, cpu.MR.ihr);
ihr              9527 src/dps8/dps8_ins.c       if (cpu.MR_cache.emr && cpu.MR_cache.ihr && is_ou)
ihr              9529 src/dps8/dps8_ins.c       if (cpu.MR_cache.emr && cpu.MR_cache.ihr && is_du)