enable            206 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.enable [i]);
enable            553 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.enable [port_num] = (uint) v;
enable            648 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].switches.enable      [0] = false;
enable            654 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].switches.enable      [1] = true;
enable            660 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].switches.enable      [2] = false;
enable            666 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].switches.enable      [3] = false;
enable            673 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [4] = false;
enable            679 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [5] = false;
enable            685 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [6] = false;
enable            691 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [7] = false;
enable            695 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].switches.enable      [1] = true; //-V1048
enable            875 src/dps8/dps8_cpu.c     cpun->switches.enable[port_num] = 1;
enable            882 src/dps8/dps8_cpu.c     cpun->switches.enable[port_num] = 0;
enable            900 src/dps8/dps8_cpu.c     cpun->switches.enable[port_num] = 1;
enable            907 src/dps8/dps8_cpu.c     cpun->switches.enable[port_num] = 0;
enable           1357 src/dps8/dps8_cpu.c         if (! cpu.switches.enable [port_num])
enable           1787 src/dps8/dps8_cpu.c         if (! cpu.switches.enable [port_num])
enable           1836 src/dps8/dps8_cpu.c         if (! cpu.switches.enable [port_num])
enable            716 src/dps8/dps8_cpu.h     uint enable [N_CPU_PORTS];
enable           8410 src/dps8/dps8_ins.c                   cpu.rA |= (word36) (cpu.switches.enable      [0] & 01LL)
enable           8421 src/dps8/dps8_ins.c                   cpu.rA |= (word36) (cpu.switches.enable      [1] & 01LL)
enable           8432 src/dps8/dps8_ins.c                   cpu.rA |= (word36) (cpu.switches.enable      [2] & 01LL)
enable           8443 src/dps8/dps8_ins.c                   cpu.rA |= (word36) (cpu.switches.enable      [3] & 01LL)
enable           8637 src/dps8/dps8_ins.c                   cpu.rA |= (word36) (cpu.switches.enable      [4] & 01LL)
enable           8648 src/dps8/dps8_ins.c                   cpu.rA |= (word36) (cpu.switches.enable      [5] & 01LL)
enable           8659 src/dps8/dps8_ins.c                   cpu.rA |= (word36) (cpu.switches.enable      [6] & 01LL)
enable           8670 src/dps8/dps8_ins.c                   cpu.rA |= (word36) (cpu.switches.enable      [7] & 01LL)
enable           10089 src/dps8/dps8_ins.c         if (! cpu.switches.enable [port_num] ||