cpt1U 2516 src/dps8/dps8_cpu.c CPT (cpt1U, 16); // LUF cpt1U 2891 src/dps8/dps8_cpu.c CPT (cpt1U, 0); // Interrupt cycle cpt1U 2921 src/dps8/dps8_cpu.c CPT (cpt1U, 1); // safe store complete cpt1U 2938 src/dps8/dps8_cpu.c CPT (cpt1U, 2); // interrupt pending cpt1U 2947 src/dps8/dps8_cpu.c CPT (cpt1U, 3); // interrupt identified cpt1U 2961 src/dps8/dps8_cpu.c CPT (cpt1U, 4); // interrupt pair fetched cpt1U 2971 src/dps8/dps8_cpu.c CPT (cpt1U, 5); // interrupt pair spurious cpt1U 2995 src/dps8/dps8_cpu.c CPT (cpt1U, 13); // fetch cycle cpt1U 3099 src/dps8/dps8_cpu.c CPT (cpt1U, 14); // sampling interrupts cpt1U 3182 src/dps8/dps8_cpu.c CPT (cpt1U, 15); // interrupt cpt1U 3234 src/dps8/dps8_cpu.c cpt1U 3276 src/dps8/dps8_cpu.c CPT (cpt1U, 20); // not XEC or RPx cpt1U 3292 src/dps8/dps8_cpu.c CPT (cpt1U, 21); // go to exec cycle cpt1U 3435 src/dps8/dps8_cpu.c CPT (cpt1U, 22); // exec cycle cpt1U 3464 src/dps8/dps8_cpu.c CPT (cpt1U, 23); // execution complete cpt1U 3489 src/dps8/dps8_cpu.c CPT (cpt1U, 27); // XEx instruction cpt1U 3504 src/dps8/dps8_cpu.c CPT (cpt1U, 24); // transfer instruction cpt1U 3522 src/dps8/dps8_cpu.c CPT (cpt1U, 9); // nbar set cpt1U 3531 src/dps8/dps8_cpu.c CPT (cpt1U, 10); // temporary absolute mode cpt1U 3564 src/dps8/dps8_cpu.c CPT (cpt1U, 25); // DIS instruction cpt1U 3742 src/dps8/dps8_cpu.c CPT (cpt1U, 26); // RPx instruction cpt1U 3756 src/dps8/dps8_cpu.c CPT (cpt1U, 12); // cu restored cpt1U 3786 src/dps8/dps8_cpu.c CPT (cpt1U, 12); // cu restored cpt1U 3815 src/dps8/dps8_cpu.c CPT (cpt1U, 27); // XEx instruction cpt1U 3859 src/dps8/dps8_cpu.c CPT (cpt1U, 28); // enter fetch cycle cpt1U 3867 src/dps8/dps8_cpu.c CPT (cpt1U, 29); // sync. fault return cpt1U 3881 src/dps8/dps8_cpu.c CPT (cpt1U, 30); // fault cycle cpt1U 3943 src/dps8/dps8_cpu.c CPT (cpt1U, 31); // safe store complete cpt1U 3999 src/dps8/dps8_cpu.c CPT (cpt1U, 33); // set fault exec cycle cpt1U 1960 src/dps8/dps8_cpu.h #define cpt1U 0 // Instruction processing tracking