cycle2 4593 src/dps8/dps8_cpu.c PNL (add_history (cpup, L68_DU_HIST_REG, cpu.du.cycle1, cpu.du.cycle2);) cycle2 1192 src/dps8/dps8_cpu.h #define DU_CYCLE_GDLDA { clrmask (& cpu.du.cycle2, du2_nGDLDA); \ cycle2 1193 src/dps8/dps8_cpu.h setmask (& cpu.du.cycle2, du2_nGDLDB | du2_nGDLDC); } cycle2 1194 src/dps8/dps8_cpu.h #define DU_CYCLE_GDLDB { clrmask (& cpu.du.cycle2, du2_nGDLDB); \ cycle2 1195 src/dps8/dps8_cpu.h setmask (& cpu.du.cycle2, du2_nGDLDA | du2_nGDLDC); } cycle2 1196 src/dps8/dps8_cpu.h #define DU_CYCLE_GDLDC { clrmask (& cpu.du.cycle2, du2_nGDLDC); \ cycle2 1197 src/dps8/dps8_cpu.h setmask (& cpu.du.cycle2, du2_nGDLDA | du2_nGDLDB); } cycle2 1201 src/dps8/dps8_cpu.h #define DU_CYCLE_ANLD1 setmask (& cpu.du.cycle2, du2_ANLD1) cycle2 1202 src/dps8/dps8_cpu.h #define DU_CYCLE_ANLD2 setmask (& cpu.du.cycle2, du2_ANLD2) cycle2 1203 src/dps8/dps8_cpu.h #define DU_CYCLE_NLD1 setmask (& cpu.du.cycle2, du2_NLD1) cycle2 1204 src/dps8/dps8_cpu.h #define DU_CYCLE_NLD2 setmask (& cpu.du.cycle2, du2_NLD2) cycle2 1205 src/dps8/dps8_cpu.h #define DU_CYCLE_FRND setmask (& cpu.du.cycle2, du2_FRND) cycle2 1206 src/dps8/dps8_cpu.h #define DU_CYCLE_DGBD setmask (& cpu.du.cycle2, du2_DGBD) cycle2 1207 src/dps8/dps8_cpu.h #define DU_CYCLE_DGDB setmask (& cpu.du.cycle2, du2_DGDB) cycle2 1211 src/dps8/dps8_cpu.h #define DU_CYCLE_LDWRT1 setmask (& cpu.du.cycle2, du2_LDWRT1) cycle2 1212 src/dps8/dps8_cpu.h #define DU_CYCLE_LDWRT2 setmask (& cpu.du.cycle2, du2_LDWRT2) cycle2 1213 src/dps8/dps8_cpu.h #define DU_CYCLE_FEXOP setmask (& cpu.du.cycle2, du2_FEXOP) cycle2 1214 src/dps8/dps8_cpu.h #define DU_CYCLE_ANSTR setmask (& cpu.du.cycle2, du2_ANSTR) cycle2 1215 src/dps8/dps8_cpu.h #define DU_CYCLE_GSTR setmask (& cpu.du.cycle2, du2_GSTR) cycle2 1216 src/dps8/dps8_cpu.h #define DU_CYCLE_FLEN_128 clrmask (& cpu.du.cycle2, du2_nFLEN_128) cycle2 1240 src/dps8/dps8_cpu.h cpu.du.cycle2 = \ cycle2 1249 src/dps8/dps8_cpu.h #define DU_CYCLE_nDUD clrmask (& cpu.du.cycle2, du2_DUD) cycle2 1488 src/dps8/dps8_cpu.h word37 cycle2; cycle2 1000 src/dps8/panelScraper.c SETL1 (bank_n, 3, cpu.du.cycle2 & du2_DUD); cycle2 1009 src/dps8/panelScraper.c SETL1 (bank_n, 10, cpu.du.cycle2 & du2_DGDB); cycle2 1011 src/dps8/panelScraper.c SETL1 (bank_n, 11, cpu.du.cycle2 & du2_DGBD); cycle2 1034 src/dps8/panelScraper.c SETL1 (bank_n, 31, cpu.du.cycle2 & du2_GSTR); cycle2 1037 src/dps8/panelScraper.c SETL1 (bank_n, 32, cpu.du.cycle2 & du2_ANSTR); cycle2 1044 src/dps8/panelScraper.c SETL1 (bank_n, 39, cpu.du.cycle2 & du2_FRND); cycle2 1047 src/dps8/panelScraper.c SETL1 (bank_o, 3, cpu.du.cycle2 & du2_ANLD1); cycle2 1049 src/dps8/panelScraper.c SETL1 (bank_o, 4, cpu.du.cycle2 & du2_ANLD2); cycle2 1051 src/dps8/panelScraper.c SETL1 (bank_o, 5, cpu.du.cycle2 & du2_NLD1); cycle2 1053 src/dps8/panelScraper.c SETL1 (bank_o, 6, cpu.du.cycle2 & du2_NLD2); cycle2 1055 src/dps8/panelScraper.c SETL1 (bank_o, 7, cpu.du.cycle2 & du2_LDWRT1); cycle2 1057 src/dps8/panelScraper.c SETL1 (bank_o, 8, cpu.du.cycle2 & du2_LDWRT2); cycle2 1062 src/dps8/panelScraper.c SETL1 (bank_o, 12, cpu.du.cycle2 & du2_FEXOP); cycle2 1064 src/dps8/panelScraper.c SETL1 (bank_o, 13, cpu.du.cycle2 & du2_FBLNK); cycle2 1083 src/dps8/panelScraper.c SETL1 (bank_o, 31, !(cpu.du.cycle2 & du2_nFLEN_128)); cycle2 1085 src/dps8/panelScraper.c SETL1 (bank_o, 32, !(cpu.du.cycle2 & du2_nFEND_SEQ));