cachedBound 144 src/dps8/doAppendCycleInstructionFetch.h word14 cachedBound; cachedBound 148 src/dps8/doAppendCycleInstructionFetch.h ucCacheCheck (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, & cachedBound, & cachedP, & cachedAddress, & cachedR1, & cachedPaged); cachedBound 540 src/dps8/doAppendCycleInstructionFetch.h if (cachedBound != bound) { cachedBound 541 src/dps8/doAppendCycleInstructionFetch.h sim_printf ("cachedBound %01o != bound %01o\r\n", cachedBound, bound); cachedBound 131 src/dps8/doAppendCycleOperandRead.h word14 cachedBound; cachedBound 135 src/dps8/doAppendCycleOperandRead.h ucCacheCheck (cpup, this, cpu.TPR.TSR, cpu.TPR.CA, & cachedBound, & cachedP, & cachedAddress, & cachedR1, & cachedPaged); cachedBound 138 src/dps8/doAppendCycleOperandRead.h cacheHit ? "hit" : "miss", evcnt, this, cpu.TPR.TSR, cpu.TPR.CA, cachedBound, cachedBound 658 src/dps8/doAppendCycleOperandRead.h if (cachedBound != bound) { cachedBound 660 src/dps8/doAppendCycleOperandRead.h cachedBound, bound);