CMR 980 src/dps8/dps8_cpu.c cpu.CMR.luf = 3; // default of 16 mS CMR 2113 src/dps8/dps8_cpu.c cpu.shadowTR = (word27) cpu.TR0 - (1024u << (is_priv_mode (cpup) ? 4 : cpu.CMR.luf)); CMR 2788 src/dps8/dps8_cpu.c if (cpu.lufCounter > luf_limits[cpu.CMR.luf]) CMR 2816 src/dps8/dps8_cpu.c CMR 2840 src/dps8/dps8_cpu.c CMR 1738 src/dps8/dps8_cpu.h cache_mode_register_s CMR; CMR 437 src/dps8/dps8_faults.c cpu.CMR.csh_reg = 0; CMR 747 src/dps8/dps8_faults.c cpu.CMR.csh_reg = 0; CMR 7442 src/dps8/dps8_ins.c cpu.CMR.csh1_on = (word1) csh1_on; CMR 7443 src/dps8/dps8_ins.c cpu.CMR.csh2_on = (word1) csh2_on; CMR 7447 src/dps8/dps8_ins.c L68_ (cpu.CMR.opnd_on = getbits36_1 (cpu.CY, 56 - 36);) CMR 7448 src/dps8/dps8_ins.c cpu.CMR.inst_on = getbits36_1 (cpu.CY, 57 - 36); CMR 7449 src/dps8/dps8_ins.c cpu.CMR.csh_reg = getbits36_1 (cpu.CY, 59 - 36); CMR 7450 src/dps8/dps8_ins.c if (cpu.CMR.csh_reg) CMR 7455 src/dps8/dps8_ins.c DPS8M_ (cpu.CMR.bypass_cache = getbits36_1 (cpu.CY, 68 - 36);) CMR 7456 src/dps8/dps8_ins.c cpu.CMR.luf = getbits36_2 (cpu.CY, 70 - 36); CMR 7709 src/dps8/dps8_ins.c cpu.CMR.cache_dir_address); CMR 7710 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 51 - 36, cpu.CMR.par_bit); CMR 7711 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 52 - 36, cpu.CMR.lev_ful); CMR 7712 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 54 - 36, cpu.CMR.csh1_on); CMR 7713 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 55 - 36, cpu.CMR.csh2_on); CMR 7714 src/dps8/dps8_ins.c L68_ (putbits36_1 (& cpu.Ypair[1], 56 - 36, cpu.CMR.opnd_on);) CMR 7715 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 57 - 36, cpu.CMR.inst_on); CMR 7716 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 59 - 36, cpu.CMR.csh_reg); CMR 7717 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 60 - 36, cpu.CMR.str_asd); CMR 7718 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 61 - 36, cpu.CMR.col_ful); CMR 7719 src/dps8/dps8_ins.c putbits36_2 (& cpu.Ypair[1], 62 - 36, cpu.CMR.rro_AB); CMR 7720 src/dps8/dps8_ins.c DPS8M_ (putbits36_1 (& cpu.Ypair[1], 68 - 36, cpu.CMR.bypass_cache);) CMR 7721 src/dps8/dps8_ins.c putbits36_2 (& cpu.Ypair[1], 70 - 36, cpu.CMR.luf);