CMR 987 src/dps8/dps8_cpu.c cpu.CMR.luf = 3; // default of 16 mS CMR 2141 src/dps8/dps8_cpu.c cpu.shadowTR = (word27) cpu.TR0 - (1024u << (is_priv_mode (cpup) ? 4 : cpu.CMR.luf)); CMR 2741 src/dps8/dps8_cpu.c if (cpu.lufCounter > luf_limits[cpu.CMR.luf]) CMR 2769 src/dps8/dps8_cpu.c CMR 2793 src/dps8/dps8_cpu.c CMR 1741 src/dps8/dps8_cpu.h cache_mode_register_s CMR; CMR 438 src/dps8/dps8_faults.c cpu.CMR.csh_reg = 0; CMR 748 src/dps8/dps8_faults.c cpu.CMR.csh_reg = 0; CMR 7511 src/dps8/dps8_ins.c cpu.CMR.csh1_on = (word1) csh1_on; CMR 7512 src/dps8/dps8_ins.c cpu.CMR.csh2_on = (word1) csh2_on; CMR 7516 src/dps8/dps8_ins.c L68_ (cpu.CMR.opnd_on = getbits36_1 (cpu.CY, 56 - 36);) CMR 7517 src/dps8/dps8_ins.c cpu.CMR.inst_on = getbits36_1 (cpu.CY, 57 - 36); CMR 7518 src/dps8/dps8_ins.c cpu.CMR.csh_reg = getbits36_1 (cpu.CY, 59 - 36); CMR 7519 src/dps8/dps8_ins.c if (cpu.CMR.csh_reg) CMR 7524 src/dps8/dps8_ins.c DPS8M_ (cpu.CMR.bypass_cache = getbits36_1 (cpu.CY, 68 - 36);) CMR 7525 src/dps8/dps8_ins.c cpu.CMR.luf = getbits36_2 (cpu.CY, 70 - 36); CMR 7778 src/dps8/dps8_ins.c cpu.CMR.cache_dir_address); CMR 7779 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 51 - 36, cpu.CMR.par_bit); CMR 7780 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 52 - 36, cpu.CMR.lev_ful); CMR 7781 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 54 - 36, cpu.CMR.csh1_on); CMR 7782 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 55 - 36, cpu.CMR.csh2_on); CMR 7783 src/dps8/dps8_ins.c L68_ (putbits36_1 (& cpu.Ypair[1], 56 - 36, cpu.CMR.opnd_on);) CMR 7784 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 57 - 36, cpu.CMR.inst_on); CMR 7785 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 59 - 36, cpu.CMR.csh_reg); CMR 7786 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 60 - 36, cpu.CMR.str_asd); CMR 7787 src/dps8/dps8_ins.c putbits36_1 (& cpu.Ypair[1], 61 - 36, cpu.CMR.col_ful); CMR 7788 src/dps8/dps8_ins.c putbits36_2 (& cpu.Ypair[1], 62 - 36, cpu.CMR.rro_AB); CMR 7789 src/dps8/dps8_ins.c DPS8M_ (putbits36_1 (& cpu.Ypair[1], 68 - 36, cpu.CMR.bypass_cache);) CMR 7790 src/dps8/dps8_ins.c putbits36_2 (& cpu.Ypair[1], 70 - 36, cpu.CMR.luf);