x1 252 src/dps8/dps8_append.c word24 x1 = (2u * segno) / 1024u; // floor x1 258 src/dps8/dps8_append.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); x1 271 src/dps8/dps8_append.c __func__, x1, cpu.DSBR.ADDR, PTWx1, cpu.PTW0.ADDR, cpu.PTW0.U, x1 287 src/dps8/dps8_append.c word24 x1 = (2u * segno) / 1024u; // floor x1 297 src/dps8/dps8_append.c core_read_lock (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); x1 299 src/dps8/dps8_append.c core_write_unlock (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, PTWx1, __func__); x1 301 src/dps8/dps8_append.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); x1 303 src/dps8/dps8_append.c core_write (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, PTWx1, __func__); x1 2245 src/dps8/dps8_append.c word24 x1 = (2 * segno) / 1024; // floor x1 2248 src/dps8/dps8_append.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); x1 2691 src/dps8/dps8_ins.c case x1 (0351): // epp1 x1 2693 src/dps8/dps8_ins.c case x1 (0353): // epp3 x1 2695 src/dps8/dps8_ins.c case x1 (0371): // epp5 x1 2697 src/dps8/dps8_ins.c case x1 (0373): // epp7 x1 2726 src/dps8/dps8_ins.c case x1 (0251): // spri1 x1 2728 src/dps8/dps8_ins.c case x1 (0253): // spri3 x1 2730 src/dps8/dps8_ins.c case x1 (0651): // spri5 x1 2732 src/dps8/dps8_ins.c case x1 (0653): // spri7 x1 3002 src/dps8/dps8_ins.c case x1 (0350): // epbp0 x1 3004 src/dps8/dps8_ins.c case x1 (0352): // epbp2 x1 3006 src/dps8/dps8_ins.c case x1 (0370): // epbp4 x1 3008 src/dps8/dps8_ins.c case x1 (0372): // epbp6 x1 3084 src/dps8/dps8_ins.c case x1 (0605): // tpnz x1 3373 src/dps8/dps8_ins.c case x1 (0604): // tmoz x1 3385 src/dps8/dps8_ins.c case x1 (0250): // spbp0 x1 3387 src/dps8/dps8_ins.c case x1 (0252): // spbp2 x1 3389 src/dps8/dps8_ins.c case x1 (0650): // spbp4 x1 3391 src/dps8/dps8_ins.c case x1 (0652): // spbp6 x1 6682 src/dps8/dps8_ins.c case x1 (0601): // trtf x1 6694 src/dps8/dps8_ins.c case x1 (0600): // trtn x1 6755 src/dps8/dps8_ins.c case x1 (0606): // ttn x1 6786 src/dps8/dps8_ins.c case x1 (0310): // easp1 x1 6804 src/dps8/dps8_ins.c case x1 (0312): // easp3 x1 6822 src/dps8/dps8_ins.c case x1 (0330): // easp5 x1 6840 src/dps8/dps8_ins.c case x1 (0332): // easp7 x1 6863 src/dps8/dps8_ins.c case x1 (0311): // eawp1 x1 6887 src/dps8/dps8_ins.c case x1 (0313): // eawp3 x1 6911 src/dps8/dps8_ins.c case x1 (0331): // eawp5 x1 6935 src/dps8/dps8_ins.c case x1 (0333): // eawp7 x1 7381 src/dps8/dps8_ins.c case x1 (0754): // sra x1 7642 src/dps8/dps8_ins.c case x1 (0257): // lptp x1 7661 src/dps8/dps8_ins.c case x1 (0173): // lptr x1 7676 src/dps8/dps8_ins.c case x1 (0774): // lra x1 7704 src/dps8/dps8_ins.c case x1 (0232): // lsdr x1 7877 src/dps8/dps8_ins.c case x1 (0557): // sptp x1 7915 src/dps8/dps8_ins.c case x1 (0154): // sptr x1 7972 src/dps8/dps8_ins.c case x1 (0254): // ssdr x1 8020 src/dps8/dps8_ins.c case x1 (0532): // camp x1 8949 src/dps8/dps8_ins.c case x1 (0560): // aar0 x1 8950 src/dps8/dps8_ins.c case x1 (0561): // aar1 x1 8951 src/dps8/dps8_ins.c case x1 (0562): // aar2 x1 8952 src/dps8/dps8_ins.c case x1 (0563): // aar3 x1 8953 src/dps8/dps8_ins.c case x1 (0564): // aar4 x1 8954 src/dps8/dps8_ins.c case x1 (0565): // aar5 x1 8955 src/dps8/dps8_ins.c case x1 (0566): // aar6 x1 8956 src/dps8/dps8_ins.c case x1 (0567): // aar7 x1 9051 src/dps8/dps8_ins.c case x1 (0760): // lar0 x1 9052 src/dps8/dps8_ins.c case x1 (0761): // lar1 x1 9053 src/dps8/dps8_ins.c case x1 (0762): // lar2 x1 9054 src/dps8/dps8_ins.c case x1 (0763): // lar3 x1 9055 src/dps8/dps8_ins.c case x1 (0764): // lar4 x1 9056 src/dps8/dps8_ins.c case x1 (0765): // lar5 x1 9057 src/dps8/dps8_ins.c case x1 (0766): // lar6 x1 9058 src/dps8/dps8_ins.c case x1 (0767): // lar7 x1 9078 src/dps8/dps8_ins.c case x1 (0463): // lareg x1 9096 src/dps8/dps8_ins.c case x1 (0467): // lpl x1 9103 src/dps8/dps8_ins.c case x1 (0660): // nar0 x1 9104 src/dps8/dps8_ins.c case x1 (0661): // nar1 x1 9105 src/dps8/dps8_ins.c case x1 (0662): // nar2 x1 9106 src/dps8/dps8_ins.c case x1 (0663): // nar3 x1 9107 src/dps8/dps8_ins.c case x1 (0664): // nar4 x1 9108 src/dps8/dps8_ins.c case x1 (0665): // nar5 x1 9109 src/dps8/dps8_ins.c case x1 (0666): // nar6 beware!!!! :-) x1 9110 src/dps8/dps8_ins.c case x1 (0667): // nar7 x1 9181 src/dps8/dps8_ins.c case x1 (0540): // ara0 x1 9182 src/dps8/dps8_ins.c case x1 (0541): // ara1 x1 9183 src/dps8/dps8_ins.c case x1 (0542): // ara2 x1 9184 src/dps8/dps8_ins.c case x1 (0543): // ara3 x1 9185 src/dps8/dps8_ins.c case x1 (0544): // ara4 x1 9186 src/dps8/dps8_ins.c case x1 (0545): // ara5 x1 9187 src/dps8/dps8_ins.c case x1 (0546): // ara6 x1 9188 src/dps8/dps8_ins.c case x1 (0547): // ara7 x1 9252 src/dps8/dps8_ins.c case x1 (0640): // aar0 x1 9253 src/dps8/dps8_ins.c case x1 (0641): // aar1 x1 9254 src/dps8/dps8_ins.c case x1 (0642): // aar2 x1 9255 src/dps8/dps8_ins.c case x1 (0643): // aar3 x1 9256 src/dps8/dps8_ins.c case x1 (0644): // aar4 x1 9257 src/dps8/dps8_ins.c case x1 (0645): // aar5 x1 9258 src/dps8/dps8_ins.c case x1 (0646): // aar6 x1 9259 src/dps8/dps8_ins.c case x1 (0647): // aar7 x1 9302 src/dps8/dps8_ins.c case x1 (0740): // sar0 x1 9303 src/dps8/dps8_ins.c case x1 (0741): // sar1 x1 9304 src/dps8/dps8_ins.c case x1 (0742): // sar2 x1 9305 src/dps8/dps8_ins.c case x1 (0743): // sar3 x1 9306 src/dps8/dps8_ins.c case x1 (0744): // sar4 x1 9307 src/dps8/dps8_ins.c case x1 (0745): // sar5 x1 9308 src/dps8/dps8_ins.c case x1 (0746): // sar6 x1 9309 src/dps8/dps8_ins.c case x1 (0747): // sar7 x1 9329 src/dps8/dps8_ins.c case x1 (0443): // sareg x1 9347 src/dps8/dps8_ins.c case x1 (0447): // spl x1 9356 src/dps8/dps8_ins.c case x1 (0502): // a4bd x1 9362 src/dps8/dps8_ins.c case x1 (0501): // a6bd x1 9368 src/dps8/dps8_ins.c case x1 (0500): // a9bd x1 9374 src/dps8/dps8_ins.c case x1 (0503): // abd x1 9380 src/dps8/dps8_ins.c case x1 (0507): // awd x1 9386 src/dps8/dps8_ins.c case x1 (0522): // s4bd x1 9392 src/dps8/dps8_ins.c case x1 (0521): // s6bd x1 9398 src/dps8/dps8_ins.c case x1 (0520): // s9bd x1 9404 src/dps8/dps8_ins.c case x1 (0523): // sbd x1 9410 src/dps8/dps8_ins.c case x1 (0527): // swd x1 9416 src/dps8/dps8_ins.c case x1 (0106): // cmpc x1 9420 src/dps8/dps8_ins.c case x1 (0120): // scd x1 9424 src/dps8/dps8_ins.c case x1 (0121): // scdr x1 9428 src/dps8/dps8_ins.c case x1 (0124): // scm x1 9432 src/dps8/dps8_ins.c case x1 (0125): // scmr x1 9436 src/dps8/dps8_ins.c case x1 (0164): // tct x1 9440 src/dps8/dps8_ins.c case x1 (0165): // tctr x1 9446 src/dps8/dps8_ins.c case x1 (0100): // mlr x1 9450 src/dps8/dps8_ins.c case x1 (0101): // mrl x1 9454 src/dps8/dps8_ins.c case x1 (0020): // mve x1 9458 src/dps8/dps8_ins.c case x1 (0160): // mvt x1 9464 src/dps8/dps8_ins.c case x1 (0303): // cmpn x1 9470 src/dps8/dps8_ins.c case x1 (0300): // mvn x1 9474 src/dps8/dps8_ins.c case x1 (0024): // mvne x1 9480 src/dps8/dps8_ins.c case x1 (0060): // csl x1 9484 src/dps8/dps8_ins.c case x1 (0061): // csr x1 9490 src/dps8/dps8_ins.c case x1 (0066): // cmpb x1 9496 src/dps8/dps8_ins.c case x1 (0064): // sztl x1 9503 src/dps8/dps8_ins.c case x1 (0065): // sztr x1 9512 src/dps8/dps8_ins.c case x1 (0301): // btd x1 9516 src/dps8/dps8_ins.c case x1 (0305): // dtb x1 9522 src/dps8/dps8_ins.c case x1 (0202): // ad2d x1 9526 src/dps8/dps8_ins.c case x1 (0222): // ad3d x1 9532 src/dps8/dps8_ins.c case x1 (0203): // sb2d x1 9536 src/dps8/dps8_ins.c case x1 (0223): // sb3d x1 9542 src/dps8/dps8_ins.c case x1 (0206): // mp2d x1 9546 src/dps8/dps8_ins.c case x1 (0226): // mp3d x1 9552 src/dps8/dps8_ins.c case x1 (0207): // dv2d x1 9556 src/dps8/dps8_ins.c case x1 (0227): // dv3d x1 9560 src/dps8/dps8_ins.c case x1 (0420): // emcall instruction Custom, for an emulator call for scp x1 2097 src/dps8/dps8_sys.c x1 2102 src/dps8/dps8_sys.c x1 3220 src/dps8/dps8_sys.c word24 x1 = (2u * segno - y1) / 1024u; x1 3222 src/dps8/dps8_sys.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); x1 90 src/dps8/segldr.c uint x1 = 0; x1 91 src/dps8/segldr.c word36 * ptwp = (word36 *) M + x1 + ADDR_DSPT;