x1 252 src/dps8/dps8_append.c word24 x1 = (2u * segno) / 1024u; // floor x1 258 src/dps8/dps8_append.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); x1 271 src/dps8/dps8_append.c __func__, x1, cpu.DSBR.ADDR, PTWx1, cpu.PTW0.ADDR, cpu.PTW0.U, x1 287 src/dps8/dps8_append.c word24 x1 = (2u * segno) / 1024u; // floor x1 297 src/dps8/dps8_append.c core_read_lock (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); x1 299 src/dps8/dps8_append.c core_write_unlock (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, PTWx1, __func__); x1 301 src/dps8/dps8_append.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); x1 303 src/dps8/dps8_append.c core_write (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, PTWx1, __func__); x1 2245 src/dps8/dps8_append.c word24 x1 = (2 * segno) / 1024; // floor x1 2248 src/dps8/dps8_append.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); x1 2691 src/dps8/dps8_ins.c case x1 (0351): // epp1 x1 2693 src/dps8/dps8_ins.c case x1 (0353): // epp3 x1 2695 src/dps8/dps8_ins.c case x1 (0371): // epp5 x1 2697 src/dps8/dps8_ins.c case x1 (0373): // epp7 x1 2726 src/dps8/dps8_ins.c case x1 (0251): // spri1 x1 2728 src/dps8/dps8_ins.c case x1 (0253): // spri3 x1 2730 src/dps8/dps8_ins.c case x1 (0651): // spri5 x1 2732 src/dps8/dps8_ins.c case x1 (0653): // spri7 x1 3002 src/dps8/dps8_ins.c case x1 (0350): // epbp0 x1 3004 src/dps8/dps8_ins.c case x1 (0352): // epbp2 x1 3006 src/dps8/dps8_ins.c case x1 (0370): // epbp4 x1 3008 src/dps8/dps8_ins.c case x1 (0372): // epbp6 x1 3084 src/dps8/dps8_ins.c case x1 (0605): // tpnz x1 3372 src/dps8/dps8_ins.c case x1 (0604): // tmoz x1 3384 src/dps8/dps8_ins.c case x1 (0250): // spbp0 x1 3386 src/dps8/dps8_ins.c case x1 (0252): // spbp2 x1 3388 src/dps8/dps8_ins.c case x1 (0650): // spbp4 x1 3390 src/dps8/dps8_ins.c case x1 (0652): // spbp6 x1 6612 src/dps8/dps8_ins.c case x1 (0601): // trtf x1 6624 src/dps8/dps8_ins.c case x1 (0600): // trtn x1 6685 src/dps8/dps8_ins.c case x1 (0606): // ttn x1 6716 src/dps8/dps8_ins.c case x1 (0310): // easp1 x1 6734 src/dps8/dps8_ins.c case x1 (0312): // easp3 x1 6752 src/dps8/dps8_ins.c case x1 (0330): // easp5 x1 6770 src/dps8/dps8_ins.c case x1 (0332): // easp7 x1 6793 src/dps8/dps8_ins.c case x1 (0311): // eawp1 x1 6817 src/dps8/dps8_ins.c case x1 (0313): // eawp3 x1 6841 src/dps8/dps8_ins.c case x1 (0331): // eawp5 x1 6865 src/dps8/dps8_ins.c case x1 (0333): // eawp7 x1 7311 src/dps8/dps8_ins.c case x1 (0754): // sra x1 7572 src/dps8/dps8_ins.c case x1 (0257): // lptp x1 7591 src/dps8/dps8_ins.c case x1 (0173): // lptr x1 7606 src/dps8/dps8_ins.c case x1 (0774): // lra x1 7634 src/dps8/dps8_ins.c case x1 (0232): // lsdr x1 7807 src/dps8/dps8_ins.c case x1 (0557): // sptp x1 7845 src/dps8/dps8_ins.c case x1 (0154): // sptr x1 7902 src/dps8/dps8_ins.c case x1 (0254): // ssdr x1 7950 src/dps8/dps8_ins.c case x1 (0532): // camp x1 8807 src/dps8/dps8_ins.c case x1 (0560): // aar0 x1 8808 src/dps8/dps8_ins.c case x1 (0561): // aar1 x1 8809 src/dps8/dps8_ins.c case x1 (0562): // aar2 x1 8810 src/dps8/dps8_ins.c case x1 (0563): // aar3 x1 8811 src/dps8/dps8_ins.c case x1 (0564): // aar4 x1 8812 src/dps8/dps8_ins.c case x1 (0565): // aar5 x1 8813 src/dps8/dps8_ins.c case x1 (0566): // aar6 x1 8814 src/dps8/dps8_ins.c case x1 (0567): // aar7 x1 8909 src/dps8/dps8_ins.c case x1 (0760): // lar0 x1 8910 src/dps8/dps8_ins.c case x1 (0761): // lar1 x1 8911 src/dps8/dps8_ins.c case x1 (0762): // lar2 x1 8912 src/dps8/dps8_ins.c case x1 (0763): // lar3 x1 8913 src/dps8/dps8_ins.c case x1 (0764): // lar4 x1 8914 src/dps8/dps8_ins.c case x1 (0765): // lar5 x1 8915 src/dps8/dps8_ins.c case x1 (0766): // lar6 x1 8916 src/dps8/dps8_ins.c case x1 (0767): // lar7 x1 8936 src/dps8/dps8_ins.c case x1 (0463): // lareg x1 8954 src/dps8/dps8_ins.c case x1 (0467): // lpl x1 8961 src/dps8/dps8_ins.c case x1 (0660): // nar0 x1 8962 src/dps8/dps8_ins.c case x1 (0661): // nar1 x1 8963 src/dps8/dps8_ins.c case x1 (0662): // nar2 x1 8964 src/dps8/dps8_ins.c case x1 (0663): // nar3 x1 8965 src/dps8/dps8_ins.c case x1 (0664): // nar4 x1 8966 src/dps8/dps8_ins.c case x1 (0665): // nar5 x1 8967 src/dps8/dps8_ins.c case x1 (0666): // nar6 beware!!!! :-) x1 8968 src/dps8/dps8_ins.c case x1 (0667): // nar7 x1 9039 src/dps8/dps8_ins.c case x1 (0540): // ara0 x1 9040 src/dps8/dps8_ins.c case x1 (0541): // ara1 x1 9041 src/dps8/dps8_ins.c case x1 (0542): // ara2 x1 9042 src/dps8/dps8_ins.c case x1 (0543): // ara3 x1 9043 src/dps8/dps8_ins.c case x1 (0544): // ara4 x1 9044 src/dps8/dps8_ins.c case x1 (0545): // ara5 x1 9045 src/dps8/dps8_ins.c case x1 (0546): // ara6 x1 9046 src/dps8/dps8_ins.c case x1 (0547): // ara7 x1 9110 src/dps8/dps8_ins.c case x1 (0640): // aar0 x1 9111 src/dps8/dps8_ins.c case x1 (0641): // aar1 x1 9112 src/dps8/dps8_ins.c case x1 (0642): // aar2 x1 9113 src/dps8/dps8_ins.c case x1 (0643): // aar3 x1 9114 src/dps8/dps8_ins.c case x1 (0644): // aar4 x1 9115 src/dps8/dps8_ins.c case x1 (0645): // aar5 x1 9116 src/dps8/dps8_ins.c case x1 (0646): // aar6 x1 9117 src/dps8/dps8_ins.c case x1 (0647): // aar7 x1 9160 src/dps8/dps8_ins.c case x1 (0740): // sar0 x1 9161 src/dps8/dps8_ins.c case x1 (0741): // sar1 x1 9162 src/dps8/dps8_ins.c case x1 (0742): // sar2 x1 9163 src/dps8/dps8_ins.c case x1 (0743): // sar3 x1 9164 src/dps8/dps8_ins.c case x1 (0744): // sar4 x1 9165 src/dps8/dps8_ins.c case x1 (0745): // sar5 x1 9166 src/dps8/dps8_ins.c case x1 (0746): // sar6 x1 9167 src/dps8/dps8_ins.c case x1 (0747): // sar7 x1 9187 src/dps8/dps8_ins.c case x1 (0443): // sareg x1 9205 src/dps8/dps8_ins.c case x1 (0447): // spl x1 9214 src/dps8/dps8_ins.c case x1 (0502): // a4bd x1 9220 src/dps8/dps8_ins.c case x1 (0501): // a6bd x1 9226 src/dps8/dps8_ins.c case x1 (0500): // a9bd x1 9232 src/dps8/dps8_ins.c case x1 (0503): // abd x1 9238 src/dps8/dps8_ins.c case x1 (0507): // awd x1 9244 src/dps8/dps8_ins.c case x1 (0522): // s4bd x1 9250 src/dps8/dps8_ins.c case x1 (0521): // s6bd x1 9256 src/dps8/dps8_ins.c case x1 (0520): // s9bd x1 9262 src/dps8/dps8_ins.c case x1 (0523): // sbd x1 9268 src/dps8/dps8_ins.c case x1 (0527): // swd x1 9274 src/dps8/dps8_ins.c case x1 (0106): // cmpc x1 9278 src/dps8/dps8_ins.c case x1 (0120): // scd x1 9282 src/dps8/dps8_ins.c case x1 (0121): // scdr x1 9286 src/dps8/dps8_ins.c case x1 (0124): // scm x1 9290 src/dps8/dps8_ins.c case x1 (0125): // scmr x1 9294 src/dps8/dps8_ins.c case x1 (0164): // tct x1 9298 src/dps8/dps8_ins.c case x1 (0165): // tctr x1 9304 src/dps8/dps8_ins.c case x1 (0100): // mlr x1 9308 src/dps8/dps8_ins.c case x1 (0101): // mrl x1 9312 src/dps8/dps8_ins.c case x1 (0020): // mve x1 9316 src/dps8/dps8_ins.c case x1 (0160): // mvt x1 9322 src/dps8/dps8_ins.c case x1 (0303): // cmpn x1 9328 src/dps8/dps8_ins.c case x1 (0300): // mvn x1 9332 src/dps8/dps8_ins.c case x1 (0024): // mvne x1 9338 src/dps8/dps8_ins.c case x1 (0060): // csl x1 9342 src/dps8/dps8_ins.c case x1 (0061): // csr x1 9348 src/dps8/dps8_ins.c case x1 (0066): // cmpb x1 9354 src/dps8/dps8_ins.c case x1 (0064): // sztl x1 9361 src/dps8/dps8_ins.c case x1 (0065): // sztr x1 9370 src/dps8/dps8_ins.c case x1 (0301): // btd x1 9374 src/dps8/dps8_ins.c case x1 (0305): // dtb x1 9380 src/dps8/dps8_ins.c case x1 (0202): // ad2d x1 9384 src/dps8/dps8_ins.c case x1 (0222): // ad3d x1 9390 src/dps8/dps8_ins.c case x1 (0203): // sb2d x1 9394 src/dps8/dps8_ins.c case x1 (0223): // sb3d x1 9400 src/dps8/dps8_ins.c case x1 (0206): // mp2d x1 9404 src/dps8/dps8_ins.c case x1 (0226): // mp3d x1 9410 src/dps8/dps8_ins.c case x1 (0207): // dv2d x1 9414 src/dps8/dps8_ins.c case x1 (0227): // dv3d x1 9418 src/dps8/dps8_ins.c case x1 (0420): // emcall instruction Custom, for an emulator call for scp x1 2087 src/dps8/dps8_sys.c x1 2092 src/dps8/dps8_sys.c x1 3210 src/dps8/dps8_sys.c word24 x1 = (2u * segno - y1) / 1024u; x1 3212 src/dps8/dps8_sys.c core_read (cpup, (cpu.DSBR.ADDR + x1) & PAMASK, & PTWx1, __func__); x1 84 src/dps8/segldr.c uint x1 = 0; x1 85 src/dps8/segldr.c word36 * ptwp = (word36 *) M + x1 + ADDR_DSPT;