word1 73 src/dps8/doAppendCycleIndirectWordFetch.h word1 p = 0; word1 84 src/dps8/doAppendCycleInstructionFetch.h word1 p = 0; word1 145 src/dps8/doAppendCycleInstructionFetch.h word1 cachedP; word1 83 src/dps8/doAppendCycleOperandRead.h word1 p = 0; word1 132 src/dps8/doAppendCycleOperandRead.h word1 cachedP; word1 92 src/dps8/dps8_cpu.h word1 P; // A flag controlling execution of privileged instructions. word1 202 src/dps8/dps8_cpu.h word1 U; // A flag specifying whether the descriptor segment is word1 227 src/dps8/dps8_cpu.h word1 R; // Read permission bit. If this bit is set ON, read word1 229 src/dps8/dps8_cpu.h word1 E; // Execute permission bit. If this bit is set ON, the SDW word1 233 src/dps8/dps8_cpu.h word1 W; // Write permission bit. If this bit is set ON, write word1 235 src/dps8/dps8_cpu.h word1 P; // Privileged flag bit. If this bit is set ON, privileged word1 238 src/dps8/dps8_cpu.h word1 U; // Unpaged flag bit. If this bit is set ON, the segment word1 244 src/dps8/dps8_cpu.h word1 G; // Gate control bit. If this bit is set OFF, calls and word1 248 src/dps8/dps8_cpu.h word1 C; // Cache control bit. If this bit is set ON, data and/or word1 256 src/dps8/dps8_cpu.h word1 DF; // Directed fault flag (called F in AL39). word1 261 src/dps8/dps8_cpu.h word1 FE; // Full/empty bit. If this bit is set ON, the SDW in the word1 293 src/dps8/dps8_cpu.h word1 303 src/dps8/dps8_cpu.h word1 305 src/dps8/dps8_cpu.h word1 309 src/dps8/dps8_cpu.h word1 311 src/dps8/dps8_cpu.h word1 314 src/dps8/dps8_cpu.h word1 320 src/dps8/dps8_cpu.h word1 324 src/dps8/dps8_cpu.h word1 340 src/dps8/dps8_cpu.h word1 U; // * 1 = page has been used (referenced) word1 341 src/dps8/dps8_cpu.h word1 M; // Page modified flag bit. This bit is set ON whenever word1 346 src/dps8/dps8_cpu.h word1 DF; // Directed fault flag word1 355 src/dps8/dps8_cpu.h word1 FE; // Full/empty bit. If this bit is set ON, the PTW in word1 382 src/dps8/dps8_cpu.h word1 383 src/dps8/dps8_cpu.h word1 384 src/dps8/dps8_cpu.h word1 401 src/dps8/dps8_cpu.h word1 par_bit; word1 402 src/dps8/dps8_cpu.h word1 lev_ful; word1 403 src/dps8/dps8_cpu.h word1 csh1_on; // 1: The lower half of the cache memory is active and word1 405 src/dps8/dps8_cpu.h word1 csh2_on; // 1: The upper half of the cache memory is active and word1 408 src/dps8/dps8_cpu.h word1 opnd_on; // 1: The cache memory (if active) is used for operands. word1 410 src/dps8/dps8_cpu.h word1 inst_on; // 1: The cache memory (if active) is used for word1 418 src/dps8/dps8_cpu.h word1 csh_reg; word1 419 src/dps8/dps8_cpu.h word1 str_asd; word1 420 src/dps8/dps8_cpu.h word1 col_ful; word1 422 src/dps8/dps8_cpu.h word1 bypass_cache; // DPS8M only word1 439 src/dps8/dps8_cpu.h word1 OC_TRAP; // 0 a 16 word1 440 src/dps8/dps8_cpu.h word1 ADR_TRAP; // 0 b 17 word1 442 src/dps8/dps8_cpu.h word1 OPCODEX; // 0 OPCODE 27 word1 446 src/dps8/dps8_cpu.h word1 sdpap; // c e 20 store incorrect data parity word1 447 src/dps8/dps8_cpu.h word1 separ; // d f 21 store incorrect ZAC word1 452 src/dps8/dps8_cpu.h word1 hrhlt; // g i 28 history register overflow trap word1 455 src/dps8/dps8_cpu.h word1 hrxfr; // h j 29 strobe HR on transfer made word1 458 src/dps8/dps8_cpu.h word1 ihr; // i k 30 Enable HR word1 459 src/dps8/dps8_cpu.h word1 ihrrs; // j 31 HR reset options word1 464 src/dps8/dps8_cpu.h word1 hexfp; // l 0 33 hex mode word1 466 src/dps8/dps8_cpu.h word1 emr; // m n 35 enable MR word1 479 src/dps8/dps8_cpu.h word1 bit; word1 675 src/dps8/dps8_cpu.h word1 b29; // bit-29 - address via pointer register. Usually. word1 770 src/dps8/dps8_cpu.h word1 RB1_FULL; word1 771 src/dps8/dps8_cpu.h word1 RP_FULL; word1 772 src/dps8/dps8_cpu.h word1 RS_FULL; word1 774 src/dps8/dps8_cpu.h word1 STR_OP; word1 881 src/dps8/dps8_cpu.h word1 XSF; // 19 XSF External segment flag word1 882 src/dps8/dps8_cpu.h word1 SDWAMM; // 20 SDWAMM Match on SDWAM word1 883 src/dps8/dps8_cpu.h word1 SD_ON; // 21 SDWAM enabled word1 884 src/dps8/dps8_cpu.h word1 PTWAMM; // 22 PTWAMM Match on PTWAM word1 885 src/dps8/dps8_cpu.h word1 PT_ON; // 23 PTWAM enabled word1 888 src/dps8/dps8_cpu.h word1 889 src/dps8/dps8_cpu.h word1 890 src/dps8/dps8_cpu.h word1 891 src/dps8/dps8_cpu.h word1 892 src/dps8/dps8_cpu.h word1 893 src/dps8/dps8_cpu.h word1 894 src/dps8/dps8_cpu.h word1 895 src/dps8/dps8_cpu.h word1 896 src/dps8/dps8_cpu.h word1 907 src/dps8/dps8_cpu.h word1 IRO_ISN; // 0 IRO AVF Illegal Ring Order word1 909 src/dps8/dps8_cpu.h word1 OEB_IOC; // 1 ORB AVF Out of execute bracket [sic] should word1 912 src/dps8/dps8_cpu.h word1 EOFF_IAIM; word1 915 src/dps8/dps8_cpu.h word1 ORB_ISP; // 3 ORB AVF Out of read bracket word1 917 src/dps8/dps8_cpu.h word1 ROFF_IPR;// 4 R-OFF AVF Read bit is off word1 919 src/dps8/dps8_cpu.h word1 OWB_NEA; // 5 OWB AVF Out of write bracket word1 921 src/dps8/dps8_cpu.h word1 WOFF_OOB;// 6 W-OFF AVF Write bit is off word1 923 src/dps8/dps8_cpu.h word1 NO_GA; // 7 NO GA AVF Not a gate word1 924 src/dps8/dps8_cpu.h word1 OCB; // 8 OCB AVF Out of call bracket word1 925 src/dps8/dps8_cpu.h word1 OCALL; // 9 OCALL AVF Outward call word1 926 src/dps8/dps8_cpu.h word1 BOC; // 10 BOC AVF Bad outward call word1 928 src/dps8/dps8_cpu.h word1 PTWAM_ER;// 11 PTWAM_ER AVF PTWAM error // inward return word1 929 src/dps8/dps8_cpu.h word1 CRT; // 12 CRT AVF Cross ring transfer word1 930 src/dps8/dps8_cpu.h word1 RALR; // 13 RALR AVF Ring alarm word1 932 src/dps8/dps8_cpu.h word1 SDWAM_ER;// 14 SWWAM_ER AVF SDWAM error word1 933 src/dps8/dps8_cpu.h word1 OOSB; // 15 OOSB AVF Out of segment bounds word1 934 src/dps8/dps8_cpu.h word1 PARU; // 16 PARU Parity fault - processor parity upper word1 935 src/dps8/dps8_cpu.h word1 PARL; // 17 PARL Parity fault - processor parity lower word1 936 src/dps8/dps8_cpu.h word1 ONC1; // 18 ONC1 Operation not complete fault error #1 word1 937 src/dps8/dps8_cpu.h word1 ONC2; // 19 ONC2 Operation not complete fault error #2 word1 942 src/dps8/dps8_cpu.h word1 FLT_INT; // 35 F/I 0 = interrupt; 1 = fault word1 974 src/dps8/dps8_cpu.h word1 TSN_VALID [3]; word1 1001 src/dps8/dps8_cpu.h word1 repeat_first; word1 1003 src/dps8/dps8_cpu.h word1 rpt; // 19 RPT Execute an Repeat (rpt) instruction word1 1004 src/dps8/dps8_cpu.h word1 rd; // 20 RD Execute an Repeat Double (rpd) instruction word1 1005 src/dps8/dps8_cpu.h word1 rl; // 21 RL Execute a Repeat Link (rpl) instruction word1 1006 src/dps8/dps8_cpu.h word1 pot; // 22 POT Prepare operand tally word1 1013 src/dps8/dps8_cpu.h word1 xde; // 24 XDE Execute instruction from Execute Double even word1 1015 src/dps8/dps8_cpu.h word1 xdo; // 25 XDO Execute instruction from Execute Double odd pair word1 1016 src/dps8/dps8_cpu.h word1 itp; // 26 ITP Execute ITP indirect cycle word1 1017 src/dps8/dps8_cpu.h word1 rfi; // 27 RFI Restart this instruction word1 1018 src/dps8/dps8_cpu.h word1 its; // 28 ITS Execute ITS indirect cycle word1 1019 src/dps8/dps8_cpu.h word1 FIF; // 29 FIF Fault occurred during instruction fetch word1 1351 src/dps8/dps8_cpu.h word1 Z; // 9 1 Z All bit-string instruction results word1 1353 src/dps8/dps8_cpu.h word1 NOP; // 10 1 0 Negative overpunch found in 6-4 word1 1401 src/dps8/dps8_cpu.h word1 R; // 30 1 R Last cycle performed must be word1 1465 src/dps8/dps8_cpu.h word1 Fk [3]; word1 1471 src/dps8/dps8_cpu.h word1 Ak [3]; word1 1484 src/dps8/dps8_cpu.h word1 POL; // Prepare operand length word1 1485 src/dps8/dps8_cpu.h word1 POP; // Prepare operand pointer word1 1816 src/dps8/dps8_cpu.h word1 panel4_red_ready_light_state; word1 1817 src/dps8/dps8_cpu.h word1 panel7_enabled_light_state; word1 1820 src/dps8/dps8_cpu.h volatile word1 APU_panel_enable_match_ptw_sw; // lock word1 1821 src/dps8/dps8_cpu.h volatile word1 APU_panel_enable_match_sdw_sw; // lock word1 1822 src/dps8/dps8_cpu.h volatile word1 APU_panel_scroll_select_ul_sw; word1 1839 src/dps8/dps8_cpu.h volatile word1 DATA_panel_enable_sw; word1 1840 src/dps8/dps8_cpu.h volatile word1 DATA_panel_validate_sw; word1 1841 src/dps8/dps8_cpu.h volatile word1 DATA_panel_auto_fast_sw; // lock word1 1842 src/dps8/dps8_cpu.h volatile word1 DATA_panel_auto_slow_sw; // lock word1 1844 src/dps8/dps8_cpu.h volatile word1 DATA_panel_step_sw; // lock word1 1845 src/dps8/dps8_cpu.h volatile word1 DATA_panel_s_trig_sw; word1 1846 src/dps8/dps8_cpu.h volatile word1 DATA_panel_execute_sw; // lock word1 1847 src/dps8/dps8_cpu.h volatile word1 DATA_panel_scope_sw; word1 1848 src/dps8/dps8_cpu.h volatile word1 DATA_panel_init_sw; // lock word1 1849 src/dps8/dps8_cpu.h volatile word1 DATA_panel_exec_sw; // lock word1 1873 src/dps8/dps8_cpu.h word1 cpt [28] [36]; word1 720 src/dps8/dps8_crdpun.c word1 bit = getbits36_1 (buffer [wordno], fieldno * 12 + row); word1 738 src/dps8/dps8_crdpun.c word1 bit = getbits36_1 (buffer [wordno], fieldno * 12 + row); word1 335 src/dps8/dps8_dia.c word36 word1; // dn355_no; is_hsla; la_no; slot_no word1 345 src/dps8/dps8_dia.c word36 word1; // dn355_no; is_hsla; la_no; slot_no // 0 word0 word1 49 src/dps8/dps8_dia.h word1 1597 src/dps8/dps8_eis.c word1 yA = GET_A (opDesc); word1 4418 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); word1 4820 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); word1 7218 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); word1 7702 src/dps8/dps8_eis.c word1 T = getbits36_1 (cpu.cu.IWB, 9); word1 572 src/dps8/dps8_fnp2.c l_putbits36_1 (& data, 16, (word1) output_chain_present); word1 577 src/dps8/dps8_fnp2.c word1 644 src/dps8/dps8_fnp2.c word1 output_chain_present = 0; word1 647 src/dps8/dps8_fnp2.c l_putbits36_1 (& data, 16, (word1) output_chain_present); word1 253 src/dps8/dps8_fnp2.h word36 word1; // dn355_no; is_hsla; la_no; slot_no word1 263 src/dps8/dps8_fnp2.h word36 word1; // dn355_no; is_hsla; la_no; slot_no // 0 word0 word1 270 src/dps8/dps8_fnp2.h word36 word1; // dn355_no; is_hsla; la_no; slot_no // 0 word0 word1 71 src/dps8/dps8_fnp2_iomcmd.c static inline void l_putbits36_1 (vol word36 * x, uint p, word1 val) word1 127 src/dps8/dps8_fnp2_iomcmd.c (long long unsigned int) mbx.dn355_sub_mbxes[i].word1); word1 143 src/dps8/dps8_fnp2_iomcmd.c (unsigned long long int)mbx.fnp_sub_mbxes[i].word1); word1 1375 src/dps8/dps8_fnp2_iomcmd.c word1 output_chain_present = 1; word1 1413 src/dps8/dps8_fnp2_iomcmd.c word36 word1; word1 1414 src/dps8/dps8_fnp2_iomcmd.c iom_direct_data_service (decoded_p->iom_unit, decoded_p->chan_num, decoded_p->smbx+WORD1, & word1, direct_load); word1 1415 src/dps8/dps8_fnp2_iomcmd.c decoded_p->slot_no = getbits36_6 (word1, 12); word1 1483 src/dps8/dps8_fnp2_iomcmd.c word1 1495 src/dps8/dps8_fnp2_iomcmd.c word36 word1; word1 1496 src/dps8/dps8_fnp2_iomcmd.c iom_direct_data_service (decoded_p->iom_unit, decoded_p->chan_num, decoded_p->fsmbx+WORD1, & word1, direct_load); word1 1500 src/dps8/dps8_fnp2_iomcmd.c decoded_p->slot_no = getbits36_6 (word1, 12); word1 2337 src/dps8/dps8_fnp2_iomcmd.c word1 async = (subch_data >> 15) & 1; word1 2338 src/dps8/dps8_fnp2_iomcmd.c word1 option1 = (subch_data >> 14) & 1; word1 428 src/dps8/dps8_hw_consts.h # define GET_A(x) ((word1) (((x) >> INST_V_A) & INST_M_A )) word1 7269 src/dps8/dps8_ins.c word1 c = (i->address >> 7) & 1; word1 7446 src/dps8/dps8_ins.c cpu.CMR.csh1_on = (word1) csh1_on; word1 7447 src/dps8/dps8_ins.c cpu.CMR.csh2_on = (word1) csh2_on; word1 7839 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock16[j], 23, (word1) (parity & 1)); word1 7898 src/dps8/dps8_ins.c putbits36_1 (& cpu.Yblock16[j], 15, (word1) (parity & 1)); word1 9783 src/dps8/dps8_ins.c word1 saveP = cpu.PPR.P; // ISOLTS-870 02m word1 1731 src/dps8/dps8_iom.c word36 word1, word2; word1 1732 src/dps8/dps8_iom.c word1 = 0; word1 1733 src/dps8/dps8_iom.c putbits36_12 (& word1, 0, p -> stati); word1 1737 src/dps8/dps8_iom.c putbits36_1 (& word1, 13, marker ? 1 : 0); word1 1738 src/dps8/dps8_iom.c putbits36_2 (& word1, 14, 0); // software status word1 1739 src/dps8/dps8_iom.c putbits36_1 (& word1, 16, p -> initiate ? 1 : 0); word1 1740 src/dps8/dps8_iom.c putbits36_1 (& word1, 17, 0); // software abort bit word1 1741 src/dps8/dps8_iom.c putbits36_3 (& word1, 18, (word3) p -> chanStatus); word1 1743 src/dps8/dps8_iom.c putbits36_3 (& word1, 21, 0); word1 1746 src/dps8/dps8_iom.c word1 1748 src/dps8/dps8_iom.c putbits36_6 (& word1, 30, p -> recordResidue); word1 1774 src/dps8/dps8_iom.c __func__, word1, word2); word1 1782 src/dps8/dps8_iom.c iom_core_write2 (iom_unit_idx, addr, word1, word2, __func__); word1 1884 src/dps8/dps8_iom.c static word24 build_IDSPTW_address (word18 PCW_PAGE_TABLE_PTR, word1 seg, word8 pageNumber) word1 1921 src/dps8/dps8_iom.c static word24 build_LPWPTW_address (word18 PCW_PAGE_TABLE_PTR, word1 seg, word8 pageNumber) word1 2210 src/dps8/dps8_iom.c void dumpDCW (word36 DCW, word1 LPW_23_REL) { word1 2241 src/dps8/dps8_iom.c word1 TDCW_31_SEG = getbits36_1 (DCW, 31); word1 2242 src/dps8/dps8_iom.c word1 TDCW_32_PDTA = getbits36_1 (DCW, 32); word1 2243 src/dps8/dps8_iom.c word1 TDCW_33_PDCW = getbits36_1 (DCW, 33); word1 2244 src/dps8/dps8_iom.c word1 TDCW_33_EC = getbits36_1 (DCW, 33); word1 2245 src/dps8/dps8_iom.c word1 TDCW_34_RES = getbits36_1 (DCW, 34); word1 2246 src/dps8/dps8_iom.c word1 TDCW_35_REL = getbits36_1 (DCW, 35); word1 3089 src/dps8/dps8_iom.c word1 PCW_LPW_23_REL = p->LPW_23_REL; word1 119 src/dps8/dps8_iom.h word1 LPW_18_RES; word1 120 src/dps8/dps8_iom.h word1 LPW_19_REL; word1 121 src/dps8/dps8_iom.h word1 LPW_20_AE; word1 122 src/dps8/dps8_iom.h word1 LPW_21_NC; word1 123 src/dps8/dps8_iom.h word1 LPW_22_TAL; word1 124 src/dps8/dps8_iom.h word1 LPW_23_REL; word1 146 src/dps8/dps8_iom.h word1 PCW_63_PTP; word1 147 src/dps8/dps8_iom.h word1 PCW_64_PGE; word1 148 src/dps8/dps8_iom.h word1 PCW_65_AUX; // XXX word1 149 src/dps8/dps8_iom.h word1 PCW_21_MSK; // Sometimes called 'M' // see 3.2.2, pg 25 word1 156 src/dps8/dps8_iom.h word1 TDCW_34_RES; word1 157 src/dps8/dps8_iom.h word1 TDCW_35_REL; word1 159 src/dps8/dps8_iom.h word1 TDCW_33_EC; word1 161 src/dps8/dps8_iom.h word1 TDCW_31_SEG; word1 162 src/dps8/dps8_iom.h word1 TDCW_32_PDTA; word1 163 src/dps8/dps8_iom.h word1 TDCW_33_PDCW; word1 168 src/dps8/dps8_iom.h word1 IDCW_EC; word1 182 src/dps8/dps8_iom.h word1 SEG; // pg B21 word1 429 src/dps8/dps8_iom.h void dumpDCW (word36 DCW, word1 LPW_23_REL); word1 531 src/dps8/dps8_math.c word1 allones = 1; word1 532 src/dps8/dps8_math.c word1 notallzeros = 0; word1 1564 src/dps8/dps8_math.c word1 carry = 0; word1 1636 src/dps8/dps8_math.c word1 carry = 0; word1 1714 src/dps8/dps8_math.c word1 notallzeros = 0; word1 1849 src/dps8/dps8_math.c word1 notallzeros = 0; word1 2052 src/dps8/dps8_math.c word1 notallzeros = 0; word1 3175 src/dps8/dps8_math.c word1 carry = 0; word1 3263 src/dps8/dps8_math.c word1 carry = 0; word1 3344 src/dps8/dps8_math.c word1 notallzeros = 0; word1 3479 src/dps8/dps8_math.c word1 notallzeros = 0; word1 2008 src/dps8/dps8_scu.c putbits36_1 (& a, 21, (word1) config_switches[scu_unit_idx].mode); word1 2010 src/dps8/dps8_scu.c putbits36_1 (& a, 30, (word1) up -> interlace); word1 2011 src/dps8/dps8_scu.c putbits36_1 (& a, 31, (word1) up -> lwr); word1 2017 src/dps8/dps8_scu.c putbits36_1 (& a, 32, (word1) up -> port_enable [0]); word1 2018 src/dps8/dps8_scu.c putbits36_1 (& a, 33, (word1) up -> port_enable [1]); word1 2019 src/dps8/dps8_scu.c putbits36_1 (& a, 34, (word1) up -> port_enable [2]); word1 2020 src/dps8/dps8_scu.c putbits36_1 (& a, 35, (word1) up -> port_enable [3]); word1 2029 src/dps8/dps8_scu.c putbits36_1 (& q, 32, (word1) up -> port_enable [4]); word1 2030 src/dps8/dps8_scu.c putbits36_1 (& q, 33, (word1) up -> port_enable [5]); word1 2031 src/dps8/dps8_scu.c putbits36_1 (& q, 34, (word1) up -> port_enable [6]); word1 2032 src/dps8/dps8_scu.c putbits36_1 (& q, 35, (word1) up -> port_enable [7]); word1 2097 src/dps8/dps8_scu.c word1 cell = up -> cells [i] ? 1 : 0; word1 2568 src/dps8/dps8_scu.c putbits36_1 (rega, 32, (word1) up -> port_enable [0]); word1 2569 src/dps8/dps8_scu.c putbits36_1 (rega, 33, (word1) up -> port_enable [1]); word1 2570 src/dps8/dps8_scu.c putbits36_1 (rega, 34, (word1) up -> port_enable [2]); word1 2571 src/dps8/dps8_scu.c putbits36_1 (rega, 35, (word1) up -> port_enable [3]); word1 2575 src/dps8/dps8_scu.c putbits36_1 (regq, 32, (word1) up -> port_enable [4]); word1 2576 src/dps8/dps8_scu.c putbits36_1 (regq, 33, (word1) up -> port_enable [5]); word1 2577 src/dps8/dps8_scu.c putbits36_1 (regq, 34, (word1) up -> port_enable [6]); word1 2578 src/dps8/dps8_scu.c putbits36_1 (regq, 35, (word1) up -> port_enable [7]); word1 4745 src/dps8/dps8_sys.c word36 word1 = *val; word1 4748 src/dps8/dps8_sys.c char *d = disassemble(buf, word1); word1 4755 src/dps8/dps8_sys.c decode_instruction (cpup, word1, p); word1 94 src/dps8/dps8_utils.c word1 a = GET_A(instruction); word1 172 src/dps8/dps8_utils.c word36 Add36b (cpu_state_t * cpup, word36 op1, word36 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf) word1 252 src/dps8/dps8_utils.c word36 Sub36b (cpu_state_t * cpup, word36 op1, word36 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf) word1 336 src/dps8/dps8_utils.c word18 Add18b (cpu_state_t * cpup, word18 op1, word18 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf) word1 412 src/dps8/dps8_utils.c word18 Sub18b (cpu_state_t * cpup, word18 op1, word18 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf) word1 496 src/dps8/dps8_utils.c word72 Add72b (cpu_state_t * cpup, word72 op1, word72 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf) word1 610 src/dps8/dps8_utils.c word72 Sub72b (cpu_state_t * cpup, word72 op1, word72 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf) word1 128 src/dps8/dps8_utils.h static inline word1 getbits36_1 (word36 x, uint i) word1 330 src/dps8/dps8_utils.h static inline word36 setbits36_1 (word36 x, uint p, word1 val) word1 474 src/dps8/dps8_utils.h static inline void putbits36_1 (word36 * x, uint p, word1 val) word1 889 src/dps8/dps8_utils.h word36 Add36b (cpu_state_t * cpup, word36 op1, word36 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf); word1 890 src/dps8/dps8_utils.h word36 Sub36b (cpu_state_t * cpup, word36 op1, word36 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf); word1 891 src/dps8/dps8_utils.h word18 Add18b (cpu_state_t * cpup, word18 op1, word18 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf); word1 892 src/dps8/dps8_utils.h word18 Sub18b (cpu_state_t * cpup, word18 op1, word18 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf); word1 893 src/dps8/dps8_utils.h word72 Add72b (cpu_state_t * cpup, word72 op1, word72 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf); word1 894 src/dps8/dps8_utils.h word72 Sub72b (cpu_state_t * cpup, word72 op1, word72 op2, word1 carryin, word18 flagsToSet, word18 * flags, bool * ovf); word1 420 src/dps8/panelScraper.c word1 fi = cpu.cycle == INTERRUPT_cycle ? 0 : 1; word1 28 src/dps8/ucache.c word1 p, word24 address, word3 r1, bool paged) { word1 50 src/dps8/ucache.c word1 * p, word24 * address, word3 * r1, bool * paged) { word1 32 src/dps8/ucache.h word1 p; word1 65 src/dps8/ucache.h word18 offset, word14 bound, word1 p, word24 address, word3 r1, bool paged); word1 68 src/dps8/ucache.h word18 offset, word14 * bound, word1 * p, word24 * address, word3 * r1, bool * paged);