sim_debug 331 src/dps8/doAppendCycleAPUDataRMW.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); sim_debug 287 src/dps8/doAppendCycleAPUDataRead.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); sim_debug 291 src/dps8/doAppendCycleAPUDataStore.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); sim_debug 402 src/dps8/doAppendCycleIndirectWordFetch.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); sim_debug 581 src/dps8/doAppendCycleInstructionFetch.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); sim_debug 329 src/dps8/doAppendCycleOperandRMW.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); sim_debug 701 src/dps8/doAppendCycleOperandRead.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); sim_debug 289 src/dps8/doAppendCycleOperandStore.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); sim_debug 326 src/dps8/doAppendCycleRTCDOperandFetch.h sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); sim_debug 268 src/dps8/dps8_absi.c sim_debug (DBG_TRACE, & absi_dev, sim_debug 77 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 103 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 195 src/dps8/dps8_addrmods.c sim_debug (DBG_APPENDING, & cpu_dev, sim_debug 239 src/dps8/dps8_addrmods.c sim_debug (DBG_APPENDING, & cpu_dev, sim_debug 259 src/dps8/dps8_addrmods.c sim_debug (DBG_APPENDING, & cpu_dev, sim_debug 283 src/dps8/dps8_addrmods.c sim_debug (DBG_APPENDING, & cpu_dev, sim_debug 315 src/dps8/dps8_addrmods.c sim_debug (DBG_APPENDING, & cpu_dev, "do_ITS_ITP sets XSF to 1\n"); sim_debug 325 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 334 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 374 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 377 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 413 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 436 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 470 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, "R_MOD: Cr=%06o\n", Cr); sim_debug 474 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 504 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, "R_MOD: TPR.CA=%06o\n", sim_debug 513 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, "RI_MOD: Td=%o\n", Td); sim_debug 526 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 551 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 610 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 628 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 638 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 667 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 672 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 682 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 733 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 740 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 743 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 792 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 831 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 846 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 858 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 954 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 990 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1017 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1031 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1038 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1059 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1075 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1078 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1108 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1138 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1145 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1148 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1176 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1197 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1213 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1216 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1234 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1266 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1281 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1305 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1348 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1366 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1388 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1411 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1460 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1478 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1499 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 1525 src/dps8/dps8_addrmods.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 53 src/dps8/dps8_append.c # define DBGAPP(...) sim_debug (DBG_APPENDING, & cpu_dev, __VA_ARGS__) sim_debug 1891 src/dps8/dps8_append.c sim_debug (DBG_TRACEEXT, & cpu_dev, "loading of cpu.TPR.TSR sets XSF to 1\n"); sim_debug 1318 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Status request\n", __func__); sim_debug 1324 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read BCD echoed\n", __func__); sim_debug 1333 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Write BCD\n", __func__); sim_debug 1342 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read ASCII echoed\n", __func__); sim_debug 1351 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Write ASCII\n", __func__); sim_debug 1369 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Reset\n", __func__); sim_debug 1381 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read ASCII unechoed\n", __func__); sim_debug 1390 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Alert\n", __func__); sim_debug 1407 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Read ID\n", __func__); sim_debug 1416 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Lock\n", __func__); sim_debug 1423 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Unlock\n", __func__); sim_debug 1430 src/dps8/dps8_console.c sim_debug (DBG_DEBUG, & opc_dev, "%s: Unknown command 0%o\n", __func__, p->IDCW_DEV_CMD); sim_debug 900 src/dps8/dps8_cpu.c sim_debug (DBG_CYCLE, & cpu_dev, "Setting cycle to %s\n", sim_debug 1577 src/dps8/dps8_cpu.c sim_debug (DBG_INFO, & cpu_dev, "CPU reset: Running\n"); sim_debug 2117 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, "set_temporary_absolute_mode bit 29 sets XSF to 0\n"); sim_debug 2335 src/dps8/dps8_cpu.c sim_debug (DBG_CYCLE, & cpu_dev, "Cycle is %s\n", sim_debug 2371 src/dps8/dps8_cpu.c sim_debug (DBG_INTR, & cpu_dev, "intr_pair_addr %u flag %d\n", sim_debug 2554 src/dps8/dps8_cpu.c sim_debug (DBG_CYCLE, & cpu_dev, sim_debug 2657 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, "fetchCycle bit 29 sets XSF to 0\n"); sim_debug 2759 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 2767 src/dps8/dps8_cpu.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 3513 src/dps8/dps8_cpu.c sim_debug (DBG_WARN, & cpu_dev, sim_debug 3541 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, sim_debug 3608 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, sim_debug 3690 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, sim_debug 3708 src/dps8/dps8_cpu.c sim_debug (DBG_MSG, & cpu_dev, sim_debug 3717 src/dps8/dps8_cpu.c sim_debug (DBG_WARN, & cpu_dev, sim_debug 3745 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, sim_debug 3754 src/dps8/dps8_cpu.c sim_debug (DBG_WARN, & cpu_dev, sim_debug 3781 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, sim_debug 3796 src/dps8/dps8_cpu.c sim_debug (DBG_MSG, & cpu_dev, sim_debug 3830 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, "core_write2 %08o %012llo (%s)\n", addr - 1, sim_debug 3856 src/dps8/dps8_cpu.c sim_debug (DBG_CORE, & cpu_dev, "core_write2 %08o %012"PRIo64" (%s)\n", addr, odd, ctx); sim_debug 3992 src/dps8/dps8_cpu.c sim_debug (DBG_DEBUG, & cpu_dev, "APU: Setting absolute mode.\n"); sim_debug 4001 src/dps8/dps8_cpu.c sim_debug (DBG_DEBUG, & cpu_dev, "APU: Keeping append mode.\n"); sim_debug 4003 src/dps8/dps8_cpu.c sim_debug (DBG_DEBUG, & cpu_dev, "APU: Setting append mode.\n"); sim_debug 4009 src/dps8/dps8_cpu.c sim_debug (DBG_ERR, & cpu_dev, sim_debug 1190 src/dps8/dps8_crdpun.c sim_debug (DBG_TRACE, & pun_dev, "%s: PUN %c%02o_%02o\n", sim_debug 1204 src/dps8/dps8_crdpun.c sim_debug (DBG_DEBUG, & pun_dev, "%s: Punch Binary\n", __func__); sim_debug 1210 src/dps8/dps8_crdpun.c sim_debug (DBG_DEBUG, & pun_dev, "%s: Set Diagnostic Mode\n", __func__); sim_debug 1215 src/dps8/dps8_crdpun.c sim_debug (DBG_DEBUG, & pun_dev, "%s: Reset Status\n", __func__); sim_debug 1227 src/dps8/dps8_crdpun.c sim_debug (DBG_DEBUG, & pun_dev, "%s: stati %04o\n", __func__, p->stati); sim_debug 468 src/dps8/dps8_crdrdr.c sim_debug (DBG_NOTIFY, & rdr_dev, "Read binary\n"); sim_debug 916 src/dps8/dps8_crdrdr.c sim_debug (DBG_TRACE, & rdr_dev, "%s: RDR %c%02o_%02o\n", sim_debug 933 src/dps8/dps8_crdrdr.c sim_debug (DBG_DEBUG, & rdr_dev, "%s: Request Status\n", __func__); sim_debug 944 src/dps8/dps8_crdrdr.c sim_debug (DBG_DEBUG, & rdr_dev, "%s: Read Binary\n", __func__); sim_debug 966 src/dps8/dps8_crdrdr.c sim_debug (DBG_DEBUG, & rdr_dev, "%s: Request Status\n", __func__); sim_debug 988 src/dps8/dps8_crdrdr.c sim_debug (DBG_DEBUG, & rdr_dev, "%s: stati %04o\n", __func__, p->stati); sim_debug 428 src/dps8/dps8_decimal.c sim_debug 430 src/dps8/dps8_decimal.c sim_debug 473 src/dps8/dps8_decimal.c sim_debug 477 src/dps8/dps8_decimal.c sim_debug 492 src/dps8/dps8_decimal.c sim_debug 512 src/dps8/dps8_decimal.c sim_debug 541 src/dps8/dps8_decimal.c sim_debug 558 src/dps8/dps8_decimal.c sim_debug 580 src/dps8/dps8_decimal.c sim_debug 592 src/dps8/dps8_decimal.c sim_debug 610 src/dps8/dps8_decimal.c sim_debug 614 src/dps8/dps8_decimal.c sim_debug 630 src/dps8/dps8_decimal.c sim_debug 655 src/dps8/dps8_decimal.c sim_debug 679 src/dps8/dps8_decimal.c sim_debug 697 src/dps8/dps8_decimal.c sim_debug 705 src/dps8/dps8_decimal.c sim_debug 86 src/dps8/dps8_dia.c sim_debug (DBG_ERR, & dia_dev, "DIA SET CONFIG: Invalid unit number %ld\n", sim_debug 132 src/dps8/dps8_dia.c sim_debug (DBG_ERR, & dia_dev, sim_debug 152 src/dps8/dps8_dia.c sim_debug (DBG_ERR, & dia_dev, sim_debug 482 src/dps8/dps8_dia.c sim_debug (DBG_TRACE, & dia_dev, "CS interrupt %u\n", cell); sim_debug 497 src/dps8/dps8_dia.c sim_debug (DBG_ERR, & dia_dev, "fnp illegal cell number %d\n", cell); sim_debug 634 src/dps8/dps8_dia.c sim_debug (DBG_TRACE, & dia_dev, "FNP reset??\n"); sim_debug 786 src/dps8/dps8_dia.c sim_debug (DBG_TRACE, & dia_dev, "FNP data xfer??\n"); sim_debug 825 src/dps8/dps8_dia.c sim_debug (DBG_NOTIFY, & dia_dev, "Request status\n"); sim_debug 1188 src/dps8/dps8_disk.c sim_debug (DBG_NOTIFY, & dsk_dev, "Read %d\n", dev_unit_idx); sim_debug 556 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISWriteCache addr %06o\n", p->cachedAddr); sim_debug 571 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 577 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } sim_debug 599 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 605 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Write8 NO PR TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } sim_debug 620 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISReadCache addr %06o\n", address); sim_debug 644 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } sim_debug 650 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 665 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EIS %ld Read8 NO PR TRR %o TSR %05o\n", eisaddr_idx, cpu.TPR.TRR, cpu.TPR.TSR); } sim_debug 670 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 688 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISWriteIdx addr %06o n %u\n", cpu.du.Dk_PTR_W[eisaddr_idx], n); sim_debug 691 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISWriteIdx addr %06o n %u\n", p->address, n); sim_debug 727 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISReadIdx addr %06o n %u\n", cpu.du.Dk_PTR_W[eisaddr_idx], n); sim_debug 731 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISReadIdx %ld addr %06o n %u\n", eisaddr_idx, p->address, n); sim_debug 757 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISRead addr %06o\n", cpu.du.Dk_PTR_W[eisaddr_idx]); sim_debug 759 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISRead addr %06o\n", p->address); sim_debug 770 src/dps8/dps8_eis.c sim_debug 772 src/dps8/dps8_eis.c sim_debug 792 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s addr %06o\n", __func__, addressN); sim_debug 812 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 816 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 835 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 854 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s addr %06o\n", __func__, addressN); sim_debug 874 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 878 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 897 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 959 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISGet469 : k: %u TAk %u coffset %u c %o \n", k, cpu.du.TAk[k - 1], residue, c); sim_debug 961 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "EISGet469 : k: %u TAk %u coffset %u c %o \n", k, e -> TA [k - 1], residue, c); sim_debug 1274 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "AR n %u k %u\n", n, k - 1); sim_debug 1279 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "No ARb %u\n", k - 1); sim_debug 1306 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "No ARa %u\n", k - 1); sim_debug 1422 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "AR n %u k %u\n", n, k - 1); sim_debug 1429 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "initial CN%u %u\n", k, CN); sim_debug 1464 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "N%u %o\n", k, e->N[k-1]); sim_debug 1508 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "CN%d set to %d by CTA4\n", sim_debug 1532 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "CN%d set to %d by CTA6\n", sim_debug 1546 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 1558 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "CN%d set to %d by CTA9\n", sim_debug 1713 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "parseNumericOperandDescriptor(cpup, ): N%u %0o\n", k, e->N[k-1]); sim_debug 1813 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 1817 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 1856 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "bitstring k %d AR%d\n", k, n); sim_debug 1876 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "bitstring k %d RL reg %u val %"PRIo64"\n", k, reg, (word36)e->N[k-1]); sim_debug 1883 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "bitstring k %d opdesc %012"PRIo64"\n", k, opDesc); sim_debug 1884 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "N%u %u\n", k, e->N[k-1]); sim_debug 2109 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2116 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2122 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2130 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2151 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "axbd augend 0%o addend 0%o sum 0%o\n", augend, addend, sum); sim_debug 2265 src/dps8/dps8_eis.c sim_debug 2297 src/dps8/dps8_eis.c sim_debug 2348 src/dps8/dps8_eis.c sim_debug 2388 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2395 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2404 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2411 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2471 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2478 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2487 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2493 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, sim_debug 2516 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "s9bd r 0%o\n", r); sim_debug 2518 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "s9bd ARn 0%o address 0%o reg 0%o r 0%o\n", ARn, address, reg, r); sim_debug 2804 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "asxbd sz %d r 0%"PRIo64"\n", sz, rcnt); sim_debug 2820 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "asxbd sz %d ARn 0%o address 0%o reg 0%o r 0%o\n", sz, ARn, address, reg, r); sim_debug 2897 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT|DBG_CAC, & cpu_dev, "asxbd augend 0%o addend 0%o sum 0%o\n", augend, addend, sum); sim_debug 3076 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpc tally %d c1 %03o c2 %03o\n", cpu.du.CHTALLY, c1, c2); sim_debug 3953 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 3956 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4020 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4047 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4148 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4151 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4215 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4243 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4472 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4476 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 4513 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #3\n"); sim_debug 4553 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #4\n"); sim_debug 4593 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #1\n"); sim_debug 4623 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR special case #2\n"); sim_debug 4888 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MRL special case #1\n"); sim_debug 4919 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MRL special case #2\n"); sim_debug 5082 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "src: %d: %o\n", n, c); sim_debug 5208 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "inBuffer:"); sim_debug 5210 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, " %02o", * q); sim_debug 5211 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "\n"); sim_debug 5883 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "LTE IT[%d]<=%d\n", e -> mopIF - 1, next); sim_debug 5934 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC IF %d, srcTally %d, dstTally %d\n", e->mopIF, e->srcTally, e->dstTally); sim_debug 5937 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC n %d, srcTally %d, dstTally %d\n", n, e->srcTally, e->dstTally); sim_debug 5949 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC c %d (0%o)\n", c, c); sim_debug 5952 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC ES off\n"); sim_debug 5954 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC is zero\n"); sim_debug 5961 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC is not zero\n"); sim_debug 5975 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLC ES on\n"); sim_debug 6045 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MFLS n %d c %o\n", n, c); sim_debug 6051 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6064 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6088 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6105 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "ES is ON, the character is moved to the receiving field.\n"); sim_debug 6147 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MORS mopIF %d src %d dst %d\n", e->mopIF, e->srcTally, e->dstTally); sim_debug 6189 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC mopIF %d\n", e->mopIF); sim_debug 6193 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC n %d srcTally %d dstTally %d\n", n, e->srcTally, e->dstTally); sim_debug 6201 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC write to output buffer %o\n", *e->in); sim_debug 6210 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MVC done\n"); sim_debug 6541 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MOP %s(%o) %o\n", m -> mopName, mop, e->mopIF); sim_debug 6545 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "getMop(e->m == NULL || e->m->f == NULL): mop:%d IF:%d\n", mop, e->mopIF); sim_debug 6593 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6599 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "mopExecutor EISgetMop forced break\n"); sim_debug 6624 src/dps8/dps8_eis.c sim_debug 6630 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6650 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "mop faults %o src %d dst %d mop %d\n", sim_debug 6668 src/dps8/dps8_eis.c sim_debug 6686 src/dps8/dps8_eis.c sim_debug 6707 src/dps8/dps8_eis.c sim_debug(DBG_TRACEEXT, & cpu_dev, "mve\n"); sim_debug 7004 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7008 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7233 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7712 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 7715 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 7718 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 7757 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "n1 %d sc1 %d\n", n1, sc1); sim_debug 7788 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "n2 %d\n", n2); sim_debug 7821 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "mvn res: '%s'\n", res); sim_debug 7943 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "is neg %o\n", decNumberIsNegative(op1)); sim_debug 7944 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "is zero %o\n", decNumberIsZero(op1)); sim_debug 7945 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "R %o\n", R); sim_debug 7946 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "Trunc %o\n", Trunc); sim_debug 7947 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "TRUNC %o\n", TST_I_TRUNC); sim_debug 7948 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "OMASK %o\n", TST_I_OMASK); sim_debug 7949 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "tstOVFfault %o\n", tstOVFfault (cpup)); sim_debug 7950 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "T %o\n", T); sim_debug 7951 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "EOvr %o\n", EOvr); sim_debug 7952 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, "Ovr %o\n", Ovr); sim_debug 8085 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8354 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8358 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8570 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8739 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8743 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 8943 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb N1 %d N2 %d\n", e -> N1, e -> N2); sim_debug 8970 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb(min(e->N1, e->N2)) i %d b1 %d b2 %d\n", i, b1, b2); sim_debug 8990 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb(e->N1 < e->N2) i %d b1fill %d b2 %d\n", i, b1, b2); sim_debug 9010 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb(e->N1 > e->N2) i %d b1 %d b2fill %d\n", i, b1, b2); sim_debug 9606 src/dps8/dps8_eis.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 9782 src/dps8/dps8_eis.c sim_debug 9807 src/dps8/dps8_eis.c sim_debug 9818 src/dps8/dps8_eis.c sim_debug 9840 src/dps8/dps8_eis.c sim_debug 9861 src/dps8/dps8_eis.c sim_debug 9882 src/dps8/dps8_eis.c sim_debug 9902 src/dps8/dps8_eis.c sim_debug 9909 src/dps8/dps8_eis.c sim_debug 12491 src/dps8/dps8_eis.c sim_debug 12493 src/dps8/dps8_eis.c sim_debug 12536 src/dps8/dps8_eis.c sim_debug 12540 src/dps8/dps8_eis.c sim_debug 12557 src/dps8/dps8_eis.c sim_debug 12577 src/dps8/dps8_eis.c sim_debug 12667 src/dps8/dps8_eis.c sim_debug 12684 src/dps8/dps8_eis.c sim_debug 12706 src/dps8/dps8_eis.c sim_debug 12718 src/dps8/dps8_eis.c sim_debug 12732 src/dps8/dps8_eis.c sim_debug 12736 src/dps8/dps8_eis.c sim_debug 12752 src/dps8/dps8_eis.c sim_debug 12798 src/dps8/dps8_eis.c sim_debug 12835 src/dps8/dps8_eis.c sim_debug 12853 src/dps8/dps8_eis.c sim_debug 12861 src/dps8/dps8_eis.c sim_debug 13043 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d: clz1 %d clz2 %d\n",clz1,clz2); sim_debug 13049 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF2 %d NQ %d\n", sim_debug 13072 src/dps8/dps8_eis.c ) { sim_debug (DBG_TRACEEXT, & cpu_dev, "oops! dv2d anomalous results"); } // divide by zero has already been checked before sim_debug 13126 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d: exp1 %d exp2 %d digits op1 %d op2 %d op1a %d op2a %d\n", sim_debug 13138 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d: addzero n2 %d %s exp %d\n",n2,res,op3->exponent); sim_debug 13485 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d: clz1 %d clz2 %d\n",clz1,clz2); sim_debug 13492 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF3 %d NQ %d\n", sim_debug 13515 src/dps8/dps8_eis.c ) { sim_debug (DBG_TRACEEXT, & cpu_dev, "oops! dv3d anomalous results"); } // divide by zero has already been checked before sim_debug 13569 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 13583 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d: addzero n3 %d %s exp %d\n",n3,res,op3->exponent); sim_debug 394 src/dps8/dps8_faults.c sim_debug (DBG_FAULT, & cpu_dev, sim_debug 545 src/dps8/dps8_faults.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MIF %o\n", TST_I_MIF); sim_debug 547 src/dps8/dps8_faults.c sim_debug 673 src/dps8/dps8_faults.c sim_debug (DBG_CYCLE, & cpu_dev, "Changing fault number to Trouble fault\n"); sim_debug 716 src/dps8/dps8_faults.c sim_debug (DBG_CYCLE, & cpu_dev, "Setting cycle to FAULT_cycle\n"); sim_debug 726 src/dps8/dps8_faults.c sim_debug (DBG_FAULT, & cpu_dev, sim_debug 805 src/dps8/dps8_faults.c sim_debug (DBG_TRACEEXT, & cpu_dev, "MIF %o\n", TST_I_MIF); sim_debug 849 src/dps8/dps8_faults.c sim_debug (DBG_CYCLE, & cpu_dev, "Setting cycle to FAULT_cycle\n"); sim_debug 900 src/dps8/dps8_faults.c sim_debug (DBG_FAULT, & cpu_dev, "setG7fault CPU %d fault %d (%o) sub %"PRId64" %"PRIo64"\n", sim_debug 912 src/dps8/dps8_faults.c sim_debug (DBG_FAULT, & cpu_dev, "set_FFV_fault CPU f_fault_no %u\n", sim_debug 430 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]notifyCS %d %d\n", lineno, mbx, chan_num); sim_debug 437 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd ack_echnego_init\n", lineno); sim_debug 459 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd ack_echnego_stop\n", lineno); sim_debug 481 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd line_disconnected\n", lineno); sim_debug 503 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd input_in_mailbox\n", lineno); sim_debug 613 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd accept_input\n", lineno); sim_debug 659 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd line_break\n", lineno); sim_debug 681 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd send_output\n", lineno); sim_debug 703 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd acu_dial_failure\n", lineno); sim_debug 726 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd accept_new_terminal\n", lineno); sim_debug 794 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "[%d]rcd wru_timeout\n", lineno); sim_debug 1330 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "set_3270_write_complete\n"); sim_debug 1379 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "fnp2 send_stn_in_buffer\r\n"); sim_debug 1430 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "handling in used %u %u\r\n", stnp->stn_in_used, n_to_send); sim_debug 1503 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "fnp2 3270 poll\n"); sim_debug 1538 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "fnp2 specific poll\n"); sim_debug 1737 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "FNP input_in_mailbox\n"); sim_debug 1933 src/dps8/dps8_fnp2.c sim_debug (DBG_ERR, & fnp_dev, sim_debug 2169 src/dps8/dps8_fnp2.c sim_debug (DBG_ERR, & fnp_dev, sim_debug 2195 src/dps8/dps8_fnp2.c sim_debug (DBG_ERR, & fnp_dev, sim_debug 2320 src/dps8/dps8_fnp2.c sim_debug (DBG_ERR, & fnp_dev, "fnpSetConfig: Invalid unit number %ld\n", (long) fnpUnitIdx); sim_debug 2760 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "process3270Input nread %ld\n", (long)nread); sim_debug 2761 src/dps8/dps8_fnp2.c for (int i = 0; i < nread; i ++) sim_debug (DBG_TRACE, & fnp_dev, "%c", isgraph (e2a[buf[i]]) ? e2a[buf[i]] : '.'); sim_debug 2762 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "\r\n"); sim_debug 2763 src/dps8/dps8_fnp2.c for (int i = 0; i < nread; i ++) sim_debug (DBG_TRACE, & fnp_dev, " %02x", buf[i]); sim_debug 2764 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, "\r\n"); sim_debug 2815 src/dps8/dps8_fnp2.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 167 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] wcd op_code %u 0%o\n", sim_debug 179 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] disconnect_this_line\n", decoded_p->slot_no); sim_debug 198 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] dont_accept_calls\n", decoded_p->slot_no); sim_debug 205 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] accept_calls\n", decoded_p->slot_no); sim_debug 218 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] set_framing_chars\n", decoded_p->slot_no); sim_debug 229 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] dial out\n", decoded_p->slot_no); sim_debug 239 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] line_control\n", decoded_p->slot_no); sim_debug 260 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "ACCEPT_BID\n"); sim_debug 288 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "REPORT_WRITE_STATUS\n"); sim_debug 291 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_3270_MODE\n"); sim_debug 295 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_POLLING_ADDR\n"); sim_debug 304 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, " char1 %u\n", c1); sim_debug 305 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, " char3 %u\n", c3); sim_debug 316 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "START_POLL\n"); sim_debug 321 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_SELECT_ADDR\n"); sim_debug 327 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, " char1 %u\n", c1); sim_debug 328 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, " char3 %u\n", c3); sim_debug 368 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "STOP_AUTO_POLL\n"); sim_debug 383 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_HASP_MODE\n"); sim_debug 386 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_NAK_LIMIT\n"); sim_debug 389 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "SET_HASP_TIMERS\n"); sim_debug 454 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 546 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 576 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 590 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 621 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] input_fc_chars\n", sim_debug 655 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] output_fc_chars\n", sim_debug 689 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters\n", sim_debug 701 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters fullduplex %u\n", sim_debug 710 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters crecho %u\n", sim_debug 720 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters lfecho %u\n", sim_debug 728 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters dumpoutput\n", sim_debug 739 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters tabecho %u\n", sim_debug 748 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters listen %u\n", sim_debug 773 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters handlequit%u \n", sim_debug 784 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters chngstring %u\n", sim_debug 792 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters wru\n", sim_debug 800 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters echoplex %u\n", sim_debug 809 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters dumpinput\n", sim_debug 824 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters replay %u\n", sim_debug 833 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters polite %u\n", sim_debug 844 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters block_xfer %u %u\n", sim_debug 861 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters set_buffer_size %u\n", sim_debug 870 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters breakall %u\n", sim_debug 879 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters prefixnl %u\n", sim_debug 888 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters input_flow_control %u\n", sim_debug 897 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters output_flow_control %u\n", sim_debug 906 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters odd_parity %u\n", sim_debug 915 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters eight_bit_in %u\n", sim_debug 924 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters eight_bit_out %u\n", sim_debug 943 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters unimplemented\n", sim_debug 952 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] alter_parameters illegal\n", sim_debug 964 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] set_delay_table\n", decoded_p->slot_no); sim_debug 1060 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] report_meters\n", decoded_p->slot_no); sim_debug 1092 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] unimplemented opcode\n", decoded_p->slot_no); sim_debug 1103 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]fnp illegal opcode %d (%o)\n", sim_debug 1168 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]rcd wtx_output\n", decoded_p->slot_no); sim_debug 1237 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]wtx op_code %u 0%o\n", decoded_p->slot_no, decoded_p->op_code, decoded_p->op_code); sim_debug 1244 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] unimplemented opcode\n", decoded_p->slot_no); sim_debug 1245 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]fnp wtx unimplemented opcode %d (%o)\n", sim_debug 1417 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "io_cmd %u\n", io_cmd); sim_debug 1447 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]rcd unimplemented\n", decoded_p->slot_no); sim_debug 1448 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]fnp unimplemented io_cmd %d\n", decoded_p->slot_no, io_cmd); sim_debug 1455 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]rcd illegal opcode\n", decoded_p->slot_no); sim_debug 1456 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]fnp illegal io_cmd %d\n", decoded_p->slot_no, io_cmd); sim_debug 1503 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u]fnp interrupt\n", decoded_p->slot_no); sim_debug 1508 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] rtx\n", decoded_p->slot_no); sim_debug 1513 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] input_accepted\n", decoded_p->slot_no); sim_debug 1518 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] illegal rtx ack\n", decoded_p->slot_no); sim_debug 1526 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] wcd\n", decoded_p->slot_no); sim_debug 1531 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] terminal accepted\n", decoded_p->slot_no); sim_debug 1549 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] disconnect_this_line\n", decoded_p->slot_no); sim_debug 1557 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] reject_request_temp\n", decoded_p->slot_no); sim_debug 1600 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] unimplemented opcode\n", decoded_p->slot_no); sim_debug 1601 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]fnp reply unimplemented opcode %d (%o)\n", sim_debug 1610 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] illegal opcode\n", decoded_p->slot_no); sim_debug 1611 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]fnp reply illegal opcode %d (%o)\n", sim_debug 1633 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "[%u] illegal io_cmd\n", decoded_p->slot_no); sim_debug 1634 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "[%u]illegal/unimplemented io_cmd (%d) in fnp submbx\n", sim_debug 1658 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "odd -- Multics marked an unused mbx as unused? cell %d (mbx %d)\n", sim_debug 1660 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, " %d %d %d %d\n", sim_debug 1666 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "Multics marked cell %d (mbx %d) as unused; was %o\n", sim_debug 1672 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "clearing wait; was %d\n", linep->waitForMbxDone); sim_debug 1675 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, " %d %d %d %d\n", sim_debug 1731 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "CS interrupt %u\n", decoded_p->cell); sim_debug 1746 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_ERR, & fnp_dev, "fnp illegal cell number %d\n", decoded_p->cell); sim_debug 1772 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, "3270 controller found at unit %u line %u\r\n", devUnitIdx, lineno); sim_debug 1832 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 1941 src/dps8/dps8_fnp2_iomcmd.c sim_debug (DBG_TRACE, & fnp_dev, sim_debug 79 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 100 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 120 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 137 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 169 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 181 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 199 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 211 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 239 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 251 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 269 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 282 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 311 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 323 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 341 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 353 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 381 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 393 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 411 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 423 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 453 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 465 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 483 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 495 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 523 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 535 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 553 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 565 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 600 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 616 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 638 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 652 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 659 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 695 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 711 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 733 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 747 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 753 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 787 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 803 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 825 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 839 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 873 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 889 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 911 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 925 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 952 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 966 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 997 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1013 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1035 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1049 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1090 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1110 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1137 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1159 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1214 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1234 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1261 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1284 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1320 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, "Write(Actual) Write: bar address=%08o writeData=%012"PRIo64"\n", address, data); sim_debug 1333 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1351 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1361 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1391 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1403 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1421 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1431 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1462 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1477 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1495 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1505 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1544 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1555 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1577 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1591 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1627 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1635 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1654 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1665 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1696 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1711 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1733 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1747 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1784 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1804 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1831 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1851 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1913 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1933 src/dps8/dps8_iefp.c sim_debug (DBG_FINAL, & cpu_dev, sim_debug 1960 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 1980 src/dps8/dps8_iefp.c sim_debug (DBG_APPENDING | DBG_FINAL, & cpu_dev, sim_debug 124 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 179 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 203 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, &cpu_dev, sim_debug 206 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, &cpu_dev, sim_debug 225 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 238 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 264 src/dps8/dps8_ins.c sim_debug (DBG_ADDRMOD, & cpu_dev, sim_debug 322 src/dps8/dps8_ins.c sim_debug (DBG_TRACE, & cpu_dev, "%s %05o:%06o\n", sim_debug 338 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, sim_debug 342 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, sim_debug 348 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, sim_debug 640 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "%s sets XSF to %o\n", __func__, cpu.cu.XSF); sim_debug 1231 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%06o|%06o %s\n", sim_debug 1236 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%06o %s\n", cpu.PPR.IC, where); sim_debug 1243 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%05o:%06o|%06o %s\n", sim_debug 1249 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, "%05o:%06o %s\n", sim_debug 1259 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, sim_debug 1277 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, sim_debug 1297 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, sim_debug 1316 src/dps8/dps8_ins.c sim_debug (flag, &cpu_dev, sim_debug 1835 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 1839 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 1866 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; offset is %06o\n", offset); sim_debug 1870 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d was %06o\n", Xn, cpu.rX[Xn]); sim_debug 1877 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d now %06o\n", Xn, cpu.rX[Xn]); sim_debug 1893 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, &cpu_dev, "initialize EIS descriptors\n"); sim_debug 1951 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, &cpu_dev, sim_debug 1968 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, &cpu_dev, sim_debug 2115 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 2127 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]); sim_debug 2143 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]); sim_debug 2155 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]); sim_debug 2207 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "tally %d\n", x); sim_debug 2209 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "tally runout\n"); sim_debug 2213 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "not tally runout\n"); sim_debug 2221 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is zero terminate\n"); sim_debug 2226 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is not zero terminate\n"); sim_debug 2231 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is neg terminate\n"); sim_debug 2236 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is not neg terminate\n"); sim_debug 2241 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is carry terminate\n"); sim_debug 2246 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is not carry terminate\n"); sim_debug 2251 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "is overflow terminate\n"); sim_debug 2264 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "not terminate\n"); sim_debug 2302 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPAQI, &cpu_dev, "A=%012"PRIo64" Q=%012"PRIo64" IR:%s\n", sim_debug 2305 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPFLT, &cpu_dev, "E=%03o A=%012"PRIo64" Q=%012"PRIo64" %.10Lg\n", sim_debug 2308 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPFLT, &cpu_dev, "E=%03o A=%012"PRIo64" Q=%012"PRIo64" %.10g\n", sim_debug 2311 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPIDX, &cpu_dev, "X[0]=%06o X[1]=%06o X[2]=%06o X[3]=%06o\n", sim_debug 2313 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPIDX, &cpu_dev, "X[4]=%06o X[5]=%06o X[6]=%06o X[7]=%06o\n", sim_debug 2316 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPPR, &cpu_dev, "PR%d/%s: SNR=%05o RNR=%o WORDNO=%06o BITNO:%02o ARCHAR:%o ARBITNO:%02o\n", sim_debug 2320 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPPPR, &cpu_dev, "PRR:%o PSR:%05o P:%o IC:%06o\n", sim_debug 2322 src/dps8/dps8_ins.c sim_debug (DBG_REGDUMPDSBR, &cpu_dev, "ADDR:%08o BND:%05o U:%o STACK:%04o\n", sim_debug 2944 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, & cpu_dev, sim_debug 5245 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, "\n"); sim_debug 5246 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 5249 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 5260 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, ">>> quot 1 %"PRId64"\n", quotient); sim_debug 5261 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, ">>> rem 1 %"PRId64"\n", remainder); sim_debug 5277 src/dps8/dps8_ins.c sim_debug 5279 src/dps8/dps8_ins.c sim_debug 5287 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 5289 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 5294 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, sim_debug 5302 src/dps8/dps8_ins.c sim_debug (DBG_ERR, & cpu_dev, sim_debug 5314 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, "rA (rem) %012"PRIo64"\n", cpu.rA); sim_debug 5315 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, "rQ (quot) %012"PRIo64"\n", cpu.rQ); sim_debug 5976 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 6458 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7132 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7140 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 7564 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "ldt TR %d (%o)\n", sim_debug 7614 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RALR set to %o\n", cpu.rRALR); sim_debug 8705 src/dps8/dps8_ins.c sim_debug (DBG_MSG, & cpu_dev, "BCE DIS causes CPU halt\n"); sim_debug 8725 src/dps8/dps8_ins.c sim_debug 8735 src/dps8/dps8_ins.c sim_debug (DBG_MSG, & cpu_dev, "sys_trouble$die DIS causes CPU halt\n"); sim_debug 8740 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "entered DIS_cycle\n"); sim_debug 8767 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "DIS sees an interrupt\n"); sim_debug 8784 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "DIS sees a TRO\n"); sim_debug 8790 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "DIS refetches\n"); sim_debug 9736 src/dps8/dps8_ins.c sim_debug (DBG_APPENDING, & cpu_dev, "absa CA:%08o\n", cpu.TPR.CA); sim_debug 9792 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU interrupt return\n"); sim_debug 9871 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU FIF REFETCH return\n"); sim_debug 9879 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU rfi refetch return\n"); sim_debug 9899 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU MME2 restart return\n"); sim_debug 9914 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU rfi/FIF REFETCH return\n"); sim_debug 9925 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU MME2 restart return\n"); sim_debug 9956 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU sync fault return\n"); sim_debug 9970 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU MMEx sync fault return\n"); sim_debug 9980 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU LUF RESTART return\n"); sim_debug 9997 src/dps8/dps8_ins.c sim_debug (DBG_FAULT, & cpu_dev, "RCU ACV RESTART return\n"); sim_debug 1773 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, "%s: Status: 0%012"PRIo64" 0%012"PRIo64"\n", sim_debug 1777 src/dps8/dps8_iom.c sim_debug (DBG_WARN, &iom_dev, sim_debug 1820 src/dps8/dps8_iom.c sim_debug (DBG_WARN, & iom_dev, sim_debug 2367 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2418 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2436 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2511 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, "%s: addr %08o\n", __func__, addr); sim_debug 2554 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2560 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2565 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2603 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 2654 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 3066 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, "%s: Payload channel %c%02o\n", __func__, iomChar (iomUnitIdx), chan); sim_debug 3327 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, "%s: Connect channel\n", __func__); sim_debug 3381 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, "%s: PCW %012llo %012llo chan %02o\n", __func__, q->PCW0, q->PCW1, q->PCW_CHAN); sim_debug 3511 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 3523 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 3577 src/dps8/dps8_iom.c sim_debug (DBG_DEBUG, & iom_dev, sim_debug 1218 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "fmp A %012"PRIo64" Q %012"PRIo64" E %03o\n", cpu.rA, cpu.rQ, cpu.rE); sim_debug 2310 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dufm e1 %d %03o m1 %012"PRIo64" %012"PRIo64"\n", sim_debug 2326 src/dps8/dps8_math.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dufm e2 %d %03o m2 %012"PRIo64" %012"PRIo64"\n", sim_debug 385 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 390 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, sim_debug 448 src/dps8/dps8_mgp.c sim_debug(DBG_TRACE, &mgp_dev, sim_debug 476 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "%s: mgp_dev_$read\n", __func__); sim_debug 543 src/dps8/dps8_mgp.c sim_debug(DBG_DEBUG, &mgp_dev, "%s: mgp_dev_$write\n", __func__); sim_debug 737 src/dps8/dps8_mt.c sim_debug (DBG_ERR, & tape_dev, sim_debug 995 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read %s record\n", __func__, sim_debug 1006 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: sim_tape_rdrecf returned %d, with tbc %d\n", sim_debug 1011 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, sim_debug 1025 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, sim_debug 1044 src/dps8/dps8_mt.c sim_debug (DBG_ERR, & tape_dev, sim_debug 1047 src/dps8/dps8_mt.c sim_debug (DBG_ERR, & tape_dev, sim_debug 1067 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1073 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1111 src/dps8/dps8_mt.c sim_debug (DBG_WARN, & tape_dev, sim_debug 1248 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write %s record\n", __func__, sim_debug 1256 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1262 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1320 src/dps8/dps8_mt.c sim_debug (DBG_WARN, & tape_dev, sim_debug 1340 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: sim_tape_wrrecf returned %d, with tbc %d\n", sim_debug 1352 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, sim_debug 1385 src/dps8/dps8_mt.c sim_debug (DBG_INFO, & tape_dev, sim_debug 1414 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1446 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, sim_debug 1504 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Tape %c%02o_%02o\n", __func__, iomChar (iomUnitIdx), chan, dev_code); sim_debug 1532 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: IDCW_DEV_CMD %oo %d.\n", __func__, p->IDCW_DEV_CMD, p->IDCW_DEV_CMD); sim_debug 1540 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: controller suspend\n", __func__); sim_debug 1546 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Request status: %04o control %0o chan_cmd %02o\n", __func__, sim_debug 1608 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read controller main memory\n", __func__); sim_debug 1618 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read 9 record\n", __func__); sim_debug 1634 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Read binary record\n", __func__); sim_debug 1668 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: initiate read data transfer\n", __func__); sim_debug 1685 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write 9 record\n", __func__); sim_debug 1700 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write binary record\n", __func__); sim_debug 1713 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write Control Registers\n", __func__); sim_debug 1723 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Release controller\n", __func__); sim_debug 1725 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Release status: %04o control %0o chan_cmd %02o\n", sim_debug 1759 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write controller main memory\n", __func__); sim_debug 1776 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s Reset status\n", __func__); sim_debug 1794 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 6250 cpi\n", __func__); sim_debug 1802 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 800 bpi\n", __func__); sim_debug 1815 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 800 bpi\n", __func__); sim_debug 1828 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 556 bpi\n", __func__); sim_debug 1845 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Tally of zero interpreted as 64\n", __func__); sim_debug 1848 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Forward skip record %d\n", __func__, tally); sim_debug 1901 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s:: Forward Skip File\n", __func__); sim_debug 1928 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, "%s: Forward space %d files\n", __func__, tally); sim_debug 1954 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Backspace Record\n", __func__); sim_debug 1962 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Tally of zero interpreted as 64\n", __func__); sim_debug 1966 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Backspace record tally %d\n", __func__, tally); sim_debug 1994 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, "%s: Backspace %d records\n", __func__, skipped); sim_debug 2017 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Backspace File\n", __func__); sim_debug 2028 src/dps8/dps8_mt.c sim_debug 2032 src/dps8/dps8_mt.c sim_debug 2061 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, "%s: Backspace %d records\n", __func__, tally); sim_debug 2089 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Request device status: %o\n", __func__, p->stati); sim_debug 2114 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Reset device status: %o\n", __func__, p->stati); sim_debug 2129 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Write tape mark\n", __func__); sim_debug 2140 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: returned %d\n", __func__, ret); sim_debug 2145 src/dps8/dps8_mt.c sim_debug (DBG_NOTIFY, & tape_dev, "%s: EOM: %s\n", __func__, simh_tape_msg (ret)); sim_debug 2169 src/dps8/dps8_mt.c sim_debug (DBG_INFO, & tape_dev, "%s: Wrote tape mark; status %04o\n", __func__, p->stati); sim_debug 2182 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: survey_devices\n", __func__); sim_debug 2195 src/dps8/dps8_mt.c sim_debug (DBG_WARN, & tape_dev, "%s: Set file permit\n", __func__); sim_debug 2212 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 200 bpi\n", __func__); sim_debug 2224 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Set 1600 CPI\n", __func__); sim_debug 2233 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Rewind\n", __func__); sim_debug 2261 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: Rewind/unload\n", __func__); sim_debug 2292 src/dps8/dps8_mt.c sim_debug (DBG_DEBUG, & tape_dev, "%s: stati %04o\n", __func__, p->stati); sim_debug 552 src/dps8/dps8_prt.c sim_debug 558 src/dps8/dps8_prt.c sim_debug 1062 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, sim_debug 1140 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Request Status\n", __func__); sim_debug 1145 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited BCD, Slew One Line\n", __func__); sim_debug 1155 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited BCD, Slew Zero Lines\n", __func__); sim_debug 1165 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Reset Status\n", __func__); sim_debug 1178 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: stati %04o\n", __func__, p->stati); sim_debug 1224 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Request Status\n", __func__); sim_debug 1229 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew One Line\n", __func__); sim_debug 1239 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Load Image Buffer\n", __func__); sim_debug 1245 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew Zero Lines\n", __func__); sim_debug 1255 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Reset Status\n", __func__); sim_debug 1268 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: stati %04o\n", __func__, p->stati); sim_debug 1320 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Request Status\n", __func__); sim_debug 1325 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Load Image Buffer\n", __func__); sim_debug 1331 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew One Line\n", __func__); sim_debug 1341 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew Zero Lines\n", __func__); sim_debug 1351 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Reset Status\n", __func__); sim_debug 1364 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: stati %04o\n", __func__, p->stati); sim_debug 1416 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Request Status\n", __func__); sim_debug 1421 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Load Image Buffer\n", __func__); sim_debug 1427 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Load Image Buffer\n", __func__); sim_debug 1457 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Load VFC Image\n", __func__); sim_debug 1463 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited BCD, Slew Zero Lines\n", __func__); sim_debug 1473 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited BCD, Slew One Line\n", __func__); sim_debug 1483 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited BCD, Slew Two Lines\n", __func__); sim_debug 1493 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited BCD, Slew Top Of Page\n", __func__); sim_debug 1503 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew Zero Lines\n", __func__); sim_debug 1513 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew One Line\n", __func__); sim_debug 1523 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew Two Lines\n", __func__); sim_debug 1533 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Nonedited ASCII, Slew Top Of Page\n", __func__); sim_debug 1543 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited BCD, Slew Zero Lines\n", __func__); sim_debug 1553 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited BCD, Slew One Line\n", __func__); sim_debug 1563 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited BCD, Slew Two Lines\n", __func__); sim_debug 1573 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited BCD, Slew Top Of Page\n", __func__); sim_debug 1583 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew Zero Lines\n", __func__); sim_debug 1593 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew One Line\n", __func__); sim_debug 1603 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew Two Lines\n", __func__); sim_debug 1613 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Print Edited ASCII, Slew Top Of Page\n", __func__); sim_debug 1623 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Reset Status\n", __func__); sim_debug 1629 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Slew One Line\n", __func__); sim_debug 1645 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Slew Two Lines\n", __func__); sim_debug 1661 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Slew To Top Of Page\n", __func__); sim_debug 1677 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Reserve Device\n", __func__); sim_debug 1683 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: Release Device\n", __func__); sim_debug 1696 src/dps8/dps8_prt.c sim_debug (DBG_DEBUG, & prt_dev, "%s: stati %04o\n", __func__, p->stati); sim_debug 1977 src/dps8/dps8_prt.c sim_debug (DBG_ERR, & prt_dev, sim_debug 633 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 701 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 856 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 1055 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1059 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1064 src/dps8/dps8_scu.c sim_debug 1068 src/dps8/dps8_scu.c sim_debug 1070 src/dps8/dps8_scu.c sim_debug 1072 src/dps8/dps8_scu.c sim_debug 1076 src/dps8/dps8_scu.c sim_debug 1078 src/dps8/dps8_scu.c sim_debug 1245 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "finagle clock\n"); sim_debug 1348 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "deliver_interrupts %o\n", scu_unit_idx); sim_debug 1370 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "trying to deliver %d\n", inum); sim_debug 1371 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1416 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1425 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "interrupt set for CPU %d SCU %d\n", cpu_unit_udx, scu_unit_idx); sim_debug 1426 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1437 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "trying to deliver %d\n", inum); sim_debug 1438 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1483 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1492 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "interrupt set for CPU %d SCU %d\n", cpu_unit_udx, scu_unit_idx); sim_debug 1493 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1521 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 1533 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 1545 src/dps8/dps8_scu.c sim_debug 1557 src/dps8/dps8_scu.c sim_debug 1603 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "sscr SCU unit %o\n", scu_unit_idx); sim_debug 1652 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1665 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1672 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 1685 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1732 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "Set mask register port %d to " sim_debug 1756 src/dps8/dps8_scu.c sim_debug (DBG_WARN, & scu_dev, sim_debug 1768 src/dps8/dps8_scu.c sim_debug (DBG_WARN, & scu_dev, sim_debug 1781 src/dps8/dps8_scu.c sim_debug 1789 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 1796 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1822 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 1825 src/dps8/dps8_scu.c sim_debug (DBG_INTR, & scu_dev, sim_debug 1954 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, "rscr 1 %d\n", scu_unit_idx); sim_debug 2038 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 2079 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 2196 src/dps8/dps8_scu.c sim_debug (DBG_DEBUG, & scu_dev, sim_debug 2210 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 2212 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 2276 src/dps8/dps8_scu.c sim_debug (DBG_INFO, & scu_dev, sim_debug 2354 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 2385 src/dps8/dps8_scu.c sim_debug (DBG_WARN, & scu_dev, sim_debug 2433 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 2531 src/dps8/dps8_scu.c sim_debug (DBG_ERR, & scu_dev, sim_debug 2546 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "rmcm selected scu port %u\n", sim_debug 2555 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "rmcm got mask %011o from pima A\n", sim_debug 2561 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "rmcm got mask %011o from pima B\n", sim_debug 2583 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 2595 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, sim_debug 2631 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "SMCM SCU port num %d\n", scu_port_num); sim_debug 2649 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "SMCM intr mask 0 set to %011o\n", sim_debug 2655 src/dps8/dps8_scu.c sim_debug (DBG_TRACE, & scu_dev, "SMCM intr mask 1 set to %011o\n", sim_debug 833 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 839 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 855 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, "IDCW_DEV_CODE %d\n", p->IDCW_DEV_CODE); sim_debug 864 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 866 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 868 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 875 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 899 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 932 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 958 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 984 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 1014 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 1039 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 1068 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 1096 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, sim_debug 1113 src/dps8/dps8_socket_dev.c sim_debug (DBG_DEBUG, & skc_dev, "stati %04o\n", p->stati); sim_debug 2563 src/dps8/dps8_sys.c sim_debug (dflag, & cpu_dev, "%s", line); sim_debug 2684 src/dps8/dps8_sys.c sim_debug (dflag, & cpu_dev, "%s", line); sim_debug 2703 src/dps8/dps8_sys.c sim_debug (dflag, & cpu_dev, "%s", line); sim_debug 230 src/dps8/dps8_urp.c sim_debug (DBG_DEBUG, & urp_dev, "%s: Request Status\n", __func__); sim_debug 236 src/dps8/dps8_urp.c sim_debug (DBG_DEBUG, & urp_dev, "%s: Initiate Read Data Xfer\n", __func__); sim_debug 246 src/dps8/dps8_urp.c sim_debug (DBG_DEBUG, & urp_dev, "%s: Set Diagnostic Mode\n", __func__); sim_debug 253 src/dps8/dps8_urp.c sim_debug (DBG_DEBUG, & urp_dev, "%s: Reset Status\n", __func__); sim_debug 267 src/dps8/dps8_urp.c sim_debug (DBG_DEBUG, & urp_dev, "%s: stati %04o\n", __func__, p->stati); sim_debug 175 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 248 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Add36b res %012"PRIo64" flags %06o ovf %o\n", res, * flags, * ovf); sim_debug 614 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 622 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 668 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 676 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, sim_debug 692 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\n", sim_debug 695 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\n", sim_debug 774 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\n", sim_debug 777 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "Sub72b res %012"PRIo64"%012"PRIo64" flags %06o ovf %o\n", sim_debug 1114 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1 %016"PRIx64"%016"PRIx64"\n", op1.h, op1.l); sim_debug 1115 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2 %016"PRIx64"%016"PRIx64"\n", op2.h, op2.l); sim_debug 1118 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1s %016"PRIx64"%016"PRIx64"\n", op1s.h, op1s.l); sim_debug 1119 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2s %016"PRIx64"%016"PRIx64"\n", op2s.h, op2s.l); sim_debug 1121 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1 %016"PRIx64"%016"PRIx64"\n", (uint64_t) (op1>>64), (uint64_t) op1); sim_debug 1122 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2 %016"PRIx64"%016"PRIx64"\n", (uint64_t) (op2>>64), (uint64_t) op2); sim_debug 1125 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op1s %016"PRIx64"%016"PRIx64"\n", (uint64_t) (op1s>>64), (uint64_t) op1s); sim_debug 1126 src/dps8/dps8_utils.c sim_debug (DBG_TRACEEXT, & cpu_dev, "op2s %016"PRIx64"%016"PRIx64"\n", (uint64_t) (op2s>>64), (uint64_t) op2s); sim_debug 8672 src/simh/scp.c sim_debug (SIM_DBG_EVENT, sim_dflt_dev, sim_debug 8688 src/simh/scp.c sim_debug (SIM_DBG_EVENT, sim_dflt_dev, sim_debug 8701 src/simh/scp.c sim_debug (SIM_DBG_EVENT, sim_dflt_dev, sim_debug 8706 src/simh/scp.c sim_debug (SIM_DBG_EVENT, sim_dflt_dev, sim_debug 8750 src/simh/scp.c sim_debug (SIM_DBG_ACTIVATE, sim_dflt_dev, "Activating %s delay=%d\n", sim_uname (uptr), event_time); sim_debug 8832 src/simh/scp.c sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Canceling Event for %s\n", sim_uname(uptr)); sim_debug 9865 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Checking String[0:%lld]: %s\n", sim_debug 9867 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Against Match Data: %s\n", mstr); sim_debug 9878 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Checking String[%lld:%lld]: %s\n", sim_debug 9881 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Against Match Data: %s\n", mstr); sim_debug 9894 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Checking String[%lld:%lld]: %s\n", sim_debug 9897 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Against Match Data: %s\n", mstr); sim_debug 9909 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Buffer wrapping\n"); sim_debug 9912 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Matched expect pattern!\n"); sim_debug 9915 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Waiting for %lld more match%s before stopping\n", sim_debug 9922 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "Initiating actions: %s\n", ep->act); sim_debug 9925 src/simh/scp.c sim_debug (exp->dbit, exp->dptr, "No actions specified, stopping...\n"); sim_debug 10037 src/simh/scp.c sim_debug (snd->dbit, snd->dptr, "Too soon to inject next byte\n"); sim_debug 10045 src/simh/scp.c sim_debug (snd->dbit, snd->dptr, "Byte value: 0x%02X%s injected\n", *stat & 0xFF, dstr); sim_debug 10434 src/simh/scp.c sim_debug (reason, dptr, "%s %s %slen: %08X\n", sim_uname(uptr), txt, position, (unsigned int)len); sim_debug 10481 src/simh/scp.c sim_debug (reason, dptr, "%04lx thru %04lx same as above\n", sim_debug 10526 src/simh/scp.c sim_debug (reason, dptr, "%04lx%-48s %s%s%s\n", i, outbuf, strbuf, ebcdicbuf, rad50buf); sim_debug 10529 src/simh/scp.c sim_debug (reason, dptr, "%04lx thru %04lx same as above\n", i-(16*same), (long unsigned int)(len-1)); sim_debug 752 src/simh/sim_console.c sim_debug (DBG_XMT, &sim_remote_console, "Prompt Written: %s\n", sim_is_running ? "SIM> " : "sim> "); sim_debug 831 src/simh/sim_console.c sim_debug (DBG_RCV, &sim_remote_console, sim_debug 2049 src/simh/sim_console.c sim_debug (DBG_TRC, &sim_con_telnet, "sim_os_poll_kbd()\n"); sim_debug 247 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "_sim_disk_rdsect(unit=%lu, lba=0x%X, sects=%lu)\n", sim_debug 272 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "sim_disk_rdsect(unit=%lu, lba=0x%X, sects=%lu)\n", sim_debug 349 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "_sim_disk_wrsect(unit=%lu, lba=0x%X, sects=%lu)\n", sim_debug 373 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "sim_disk_wrsect(unit=%lu, lba=0x%X, sects=%lu)\n", sim_debug 822 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "sim_disk_attach(unit=%lu,filename='%s')\n", sim_debug 1140 src/simh/sim_disk.c sim_debug (ctx->dbit, ctx->dptr, "sim_disk_reset(unit=%lu)\n", (unsigned long)(uptr-ctx->dptr->units)); sim_debug 575 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, ctx->dptr, "rd_lnt: st: %lld, lnt: %lld, pos: %" T_ADDR_FMT "u\n", sim_debug 761 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, ctx->dptr, "rd_lnt: st: %lld, lnt: %lld, pos: %" T_ADDR_FMT "u\n", sim_debug 797 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_rdrecf(unit=%d, buf=%p, max=%lld)\n", sim_debug 861 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_rdrecr(unit=%d, buf=%p, max=%lld)\n", sim_debug 912 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_wrrecf(unit=%d, buf=%p, bc=%lld)\n", sim_debug 982 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, ctx->dptr, "wr_lnt: lnt: %lld, pos: %" T_ADDR_FMT "u\n", sim_debug 996 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_wrtmk(unit=%d)\n", (int)(uptr-ctx->dptr->units)); sim_debug 1020 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_wreom(unit=%d)\n", (int)(uptr-ctx->dptr->units)); sim_debug 1048 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_wreomrw(unit=%d)\n", (int)(uptr-ctx->dptr->units)); sim_debug 1179 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_wrgap(unit=%d, gaplen=%u)\n", (int)(uptr-ctx->dptr->units), gaplen); sim_debug 1346 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_sprecf(unit=%d)\n", (int)(uptr-ctx->dptr->units)); sim_debug 1387 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_sprecsf(unit=%d, count=%lld)\n", sim_debug 1433 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_sprecr(unit=%d)\n", (int)(uptr-ctx->dptr->units)); sim_debug 1480 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_sprecsr(unit=%d, count=%lld)\n", sim_debug 1530 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_spfilebyrecf(unit=%d, count=%lld, check_leot=%lld)\n", sim_debug 1601 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_spfilef(unit=%d, count=%lld)\n", sim_debug 1645 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_spfilebyrecr(unit=%d, count=%lld)\n", sim_debug 1697 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_spfiler(unit=%d, count=%lld)\n", sim_debug 1719 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_rewind(unit=%d)\n", (int)(uptr-ctx->dptr->units)); sim_debug 1743 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_position(unit=%d, flags=0x%X, recs=%lld, files=%lld)\n", sim_debug 1810 src/simh/sim_tape.c sim_debug (ctx->dbit, ctx->dptr, "sim_tape_reset(unit=%d)\n", (int)(uptr-ctx->dptr->units)); sim_debug 1925 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: tape_size: %" T_ADDR_FMT "u\n", tape_size); sim_debug 1937 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: %lld byte count at pos: %" T_ADDR_FMT "u\n", sim_debug 1945 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: tape mark at pos: %" T_ADDR_FMT "u\n", tpos); sim_debug 1954 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: objc: %u, different record sizes: %u\n", objc, sizec); sim_debug 1958 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: summary - %u tape marks\n", sim_debug 1961 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: summary - %u %d byte record%s\n", sim_debug 1972 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, sim_debug 1976 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, sim_debug 1980 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, sim_debug 1988 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, sim_debug 1996 src/simh/sim_tape.c sim_debug (MTSE_DBG_STR, dptr, "tpc_map: OK objc: %lld\n", (long long)objc); sim_debug 390 src/simh/sim_timer.c sim_debug (DBG_CAL, &sim_timer_dev, "_sim_rtcn_init_unit(unit=%s, time=%d, tmr=%d)\n", sim_uname(uptr), time, tmr); sim_debug 453 src/simh/sim_timer.c sim_debug (DBG_TRC, &sim_timer_dev, "sim_timer_init()\n"); sim_debug 791 src/simh/sim_timer.c sim_debug (DBG_CAL, &sim_timer_dev, sim_debug 805 src/simh/sim_timer.c sim_debug (DBG_CAL, &sim_timer_dev, sim_debug 819 src/simh/sim_timer.c sim_debug (DBG_CAL, &sim_timer_dev, sim_debug 829 src/simh/sim_timer.c sim_debug (DBG_TRC, &sim_timer_dev, "sim_timer_clock_reset()\n"); sim_debug 840 src/simh/sim_timer.c sim_debug (DBG_TRC, &sim_timer_dev, "sim_start_timer_services()\n"); sim_debug 848 src/simh/sim_timer.c sim_debug (DBG_TRC, &sim_timer_dev, "sim_stop_timer_services()\n"); sim_debug 919 src/simh/sim_timer.c sim_debug (DBG_TIM, &sim_timer_dev, "sim_timer_activate_after() - queue addition %s at %d (%d usecs)\n", sim_debug 974 src/simh/sim_timer.c sim_debug (SIM_DBG_EVENT, &sim_timer_dev, "Canceled Clock Coscheduled Event for %s\n", sim_uname(uptr)); sim_debug 283 src/simh/sim_tmxr.h sim_debug (dbits, (lp)->mp->dptr, "%s", msg); } while (0) sim_debug 287 src/simh/sim_tmxr.h { if ((lp)->rxbps) sim_debug (TMXR_DBG_RET, (lp)->mp->dptr, "Ln%d: 0x%x - Next after: %.0f\n", \ sim_debug 289 src/simh/sim_tmxr.h else sim_debug (TMXR_DBG_RET, (lp)->mp->dptr, "Ln%d: 0x%x\n", (int)((lp)-(lp)->mp->ldsc), val); \ sim_debug 294 src/simh/sim_tmxr.h sim_debug (TMXR_DBG_TRC, mp->dptr, "%s\n", (msg)); } while (0) sim_debug 298 src/simh/sim_tmxr.h sim_debug (TMXR_DBG_TRC, (lp)->mp->dptr, "Ln%d:%s\n", (int)((lp)-(lp)->mp->ldsc), (msg)); } while (0) sim_debug 302 src/simh/sim_tmxr.h sim_debug (TMXR_DBG_CON, mp->dptr, "%s\n", (msg)); } while (0) sim_debug 306 src/simh/sim_tmxr.h sim_debug (TMXR_DBG_CON, (lp)->mp->dptr, "Ln%d:%s\n", (int)((lp)-(lp)->mp->ldsc), (msg)); } while (0)