PRId64 159 src/dps8/dps8.h # if defined(PRId64) PRId64 162 src/dps8/dps8.h # if !defined(PRId64) PRId64 1547 src/dps8/dps8_eis.c "effCHAR %d = (CN %d + ARn_CHAR %d + r %"PRId64") %% 4)\r\n", PRId64 9914 src/dps8/dps8_eis.c PRId64 9921 src/dps8/dps8_eis.c PRId64 691 src/dps8/dps8_faults.c sim_printf("\r\nCycles = %"PRId64"\r\n", cpu.cycleCnt); PRId64 692 src/dps8/dps8_faults.c sim_printf("\r\nInstructions = %"PRId64"\r\n", cpu.instrCnt); PRId64 837 src/dps8/dps8_faults.c sim_printf("\r\nCycles = %"PRId64"\r\n", cpu.cycleCnt); PRId64 838 src/dps8/dps8_faults.c sim_printf("\r\nInstructions = %"PRId64"\r\n", cpu.instrCnt); PRId64 402 src/dps8/dps8_fnp2_iomcmd.c PRId64 403 src/dps8/dps8_fnp2_iomcmd.c PRId64 404 src/dps8/dps8_fnp2_iomcmd.c PRId64 405 src/dps8/dps8_fnp2_iomcmd.c PRId64 406 src/dps8/dps8_fnp2_iomcmd.c PRId64 1126 src/dps8/dps8_ins.c sim_printf ("%20"PRId64": ? opcode 0%04o X %d a %d tag 0%02do\r\n", PRId64 1129 src/dps8/dps8_ins.c sim_printf ("%20"PRId64": %s\r\n", count, result); PRId64 1138 src/dps8/dps8_ins.c sim_printf ("%20"PRId64": %s\r\n", total, result); PRId64 5312 src/dps8/dps8_ins.c ">>> dividend cpu.rQ %"PRId64" (%012"PRIo64")\r\n", PRId64 5315 src/dps8/dps8_ins.c ">>> divisor CY %"PRId64" (%012"PRIo64")\r\n", PRId64 5325 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, ">>> quot 1 %"PRId64"\r\n", quotient); PRId64 5326 src/dps8/dps8_ins.c sim_debug (DBG_CAC, & cpu_dev, ">>> rem 1 %"PRId64"\r\n", remainder); PRId64 5343 src/dps8/dps8_ins.c PRId64 5345 src/dps8/dps8_ins.c PRId64 5353 src/dps8/dps8_ins.c "dividend was = %"PRId64"\r\n", dividend); PRId64 5355 src/dps8/dps8_ins.c "quotient * divisor + remainder = %"PRId64"\r\n", PRId64 9762 src/dps8/dps8_ins.c PRId64 9814 src/dps8/dps8_ins.c PRId64 3507 src/dps8/dps8_iom.c "%s: IOM %c starting. [%"PRId64"] %05o:%08o\r\n",