Xn 1793 src/dps8/dps8_ins.c uint Xn = X (Td); // Get Xn of next instruction Xn 1794 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d was %06o\n", Xn, cpu.rX[Xn]); Xn 1796 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + offset) & AMASK; Xn 1797 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; Xn 1799 src/dps8/dps8_ins.c HDBGRegXW (Xn, "rpt 1st"); Xn 1801 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "rpt/rd/rl repeat first; X%d now %06o\n", Xn, cpu.rX[Xn]); Xn 2039 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); Xn 2040 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; Xn 2041 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; Xn 2043 src/dps8/dps8_ins.c HDBGRegXW (Xn, "rpt delta"); Xn 2045 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]); Xn 2055 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); Xn 2056 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; Xn 2057 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; Xn 2059 src/dps8/dps8_ins.c HDBGRegXW (Xn, "rpd delta even"); Xn 2061 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]); Xn 2067 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IRODD, 36 - 3); Xn 2068 src/dps8/dps8_ins.c cpu.TPR.CA = (cpu.rX[Xn] + cpu.cu.delta) & AMASK; Xn 2069 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.TPR.CA; Xn 2071 src/dps8/dps8_ins.c HDBGRegXW (Xn, "rpd delta odd"); Xn 2073 src/dps8/dps8_ins.c sim_debug (DBG_TRACEEXT, & cpu_dev, "RPT/RPD delta; X%d now %06o\n", Xn, cpu.rX[Xn]); Xn 2196 src/dps8/dps8_ins.c uint Xn = (uint) getbits36_3 (cpu.cu.IWB, 36 - 3); Xn 2199 src/dps8/dps8_ins.c cpu.rX[Xn] = cpu.lnk; Xn 2201 src/dps8/dps8_ins.c HDBGRegXW (Xn, "rl");