S1 593 src/dps8/dps8_cpu.h #define S1 S [0] S1 6853 src/dps8/dps8_eis.c switch(e->S1) S1 7356 src/dps8/dps8_eis.c switch(e->S1) S1 7421 src/dps8/dps8_eis.c if (e->S1 == CSFL) S1 7679 src/dps8/dps8_eis.c switch(e->S1) S1 7750 src/dps8/dps8_eis.c if (e->S1 == CSFL) S1 9754 src/dps8/dps8_eis.c S1 9776 src/dps8/dps8_eis.c S1 9797 src/dps8/dps8_eis.c S1 9818 src/dps8/dps8_eis.c S1 9953 src/dps8/dps8_eis.c if (e->S1 == 0 || e->SF1 != 0) S1 9986 src/dps8/dps8_eis.c switch(e->S1) S1 10166 src/dps8/dps8_eis.c switch(e->S1) S1 10231 src/dps8/dps8_eis.c if (e->S1 == CSFL) S1 10515 src/dps8/dps8_eis.c switch(e->S1) S1 10602 src/dps8/dps8_eis.c if (e->S1 == CSFL) S1 10860 src/dps8/dps8_eis.c switch(e->S1) S1 10924 src/dps8/dps8_eis.c if (e->S1 == CSFL) S1 11168 src/dps8/dps8_eis.c switch(e->S1) S1 11256 src/dps8/dps8_eis.c if (e->S1 == CSFL) S1 11499 src/dps8/dps8_eis.c switch(e->S1) S1 11563 src/dps8/dps8_eis.c if (e->S1 == CSFL) S1 11767 src/dps8/dps8_eis.c switch(e->S1) S1 11855 src/dps8/dps8_eis.c if (e->S1 == CSFL) S1 12822 src/dps8/dps8_eis.c switch(e->S1) S1 12886 src/dps8/dps8_eis.c if (e->S1 == CSFL) S1 12928 src/dps8/dps8_eis.c NQ = (n2-clz2+1) - (n1-clz1) + (-(e->S1==CSFL?op1->exponent:(int)e->SF1)); S1 12930 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF2 %d NQ %d\n",e->S1,e->S2,e->N1,e->N2,clz1,clz2,op1->exponent,op2->exponent,e->SF2,NQ); S1 13211 src/dps8/dps8_eis.c switch(e->S1) S1 13298 src/dps8/dps8_eis.c if (e->S1 == CSFL) S1 13356 src/dps8/dps8_eis.c NQ = (n2-clz2+1) - (n1-clz1) + ((e->S2==CSFL?op2->exponent:(int)e->SF2)-(e->S1==CSFL?op1->exponent:(int)e->SF1)-(int)e->SF3); S1 13358 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF3 %d NQ %d\n",e->S1,e->S2,e->N1,e->N2,clz1,clz2,op1->exponent,op2->exponent,e->SF3,NQ);