N1                571 src/dps8/dps8_cpu.h #define N1  N [0]
N1               3033 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               3036 src/dps8/dps8_eis.c     for (; cpu.du.CHTALLY < min (e->N1, e->N2); cpu.du.CHTALLY ++)
N1               3051 src/dps8/dps8_eis.c     if (e -> N1 < e -> N2)
N1               3068 src/dps8/dps8_eis.c     else if (e->N1 > e->N2)
N1               3070 src/dps8/dps8_eis.c         for ( ; cpu.du.CHTALLY < e->N1; cpu.du.CHTALLY ++)
N1               3242 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               3247 src/dps8/dps8_eis.c     if (e -> N1)
N1               3249 src/dps8/dps8_eis.c         uint limit = e -> N1 - 1;
N1               3428 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               3431 src/dps8/dps8_eis.c     if (e -> N1)
N1               3433 src/dps8/dps8_eis.c         uint limit = e -> N1 - 1;
N1               3599 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               3602 src/dps8/dps8_eis.c     uint limit = e -> N1;
N1               3771 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               3774 src/dps8/dps8_eis.c     uint limit = e -> N1;
N1               3985 src/dps8/dps8_eis.c                "TCT N1 %d\n", e -> N1);
N1               3987 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               3990 src/dps8/dps8_eis.c     for ( ; cpu.du.CHTALLY < e -> N1; cpu.du.CHTALLY ++)
N1               4024 src/dps8/dps8_eis.c     SC_I_TALLY (cpu.du.CHTALLY == e -> N1);
N1               4180 src/dps8/dps8_eis.c                "TCT N1 %d\n", e -> N1);
N1               4182 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               4185 src/dps8/dps8_eis.c     uint limit = e -> N1;
N1               4220 src/dps8/dps8_eis.c     SC_I_TALLY (cpu.du.CHTALLY == e -> N1);
N1               4420 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               4424 src/dps8/dps8_eis.c     bool ovp = (e -> N1 < e -> N2) && (fill & 0400) && (TA1 == 1) &&
N1               4427 src/dps8/dps8_eis.c     bool ovp = (e -> N1 < e -> N2) && (fill & 0400) && (e -> TA1 == 1) &&
N1               4436 src/dps8/dps8_eis.c     sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR TALLY %u TA1 %u TA2 %u N1 %u N2 %u CN1 %u CN2 %u\n", cpu.du.CHTALLY, TA1, TA2, e -> N1, e -> N2, e -> CN1, e -> CN2);
N1               4438 src/dps8/dps8_eis.c     sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR TALLY %u TA1 %u TA2 %u N1 %u N2 %u CN1 %u CN2 %u\n", cpu.du.CHTALLY, e -> TA1, e -> TA2, e -> N1, e -> N2, e -> CN1, e -> CN2);
N1               4461 src/dps8/dps8_eis.c         (e -> N1 % (PGSZ * 4)) == 0 &&  // a page
N1               4462 src/dps8/dps8_eis.c         e -> N2 == e -> N1 && // the src is the same size as the dest.
N1               4474 src/dps8/dps8_eis.c         while (cpu.du.CHTALLY < e -> N1)
N1               4501 src/dps8/dps8_eis.c         e -> N1 == 0 && // the source is entirely fill
N1               4548 src/dps8/dps8_eis.c         e -> N1 % 4 == 0 &&  // a whole number of words in the src
N1               4549 src/dps8/dps8_eis.c         e -> N2 == e -> N1 && // the src is the same size as the dest.
N1               4578 src/dps8/dps8_eis.c         e -> N1 == 0 && // the source is entirely fill
N1               4598 src/dps8/dps8_eis.c     for ( ; cpu.du.CHTALLY < min (e->N1, e->N2); cpu.du.CHTALLY ++)
N1               4646 src/dps8/dps8_eis.c             if (ovp && (cpu.du.CHTALLY == e -> N1 - 1))
N1               4662 src/dps8/dps8_eis.c     if (e -> N1 < e -> N2)
N1               4681 src/dps8/dps8_eis.c     if (e -> N1 > e -> N2)
N1               4819 src/dps8/dps8_eis.c     bool ovp = (e -> N1 < e -> N2) && (fill & 0400) && (TA1 == 1) &&
N1               4822 src/dps8/dps8_eis.c     bool ovp = (e -> N1 < e -> N2) && (fill & 0400) && (e -> TA1 == 1) &&
N1               4829 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               4843 src/dps8/dps8_eis.c         e -> N1 % 4 == 0 &&  // a whole number of words in the src
N1               4844 src/dps8/dps8_eis.c         e -> N2 == e -> N1 && // the src is the same size as the dest.
N1               4874 src/dps8/dps8_eis.c         e -> N1 == 0 && // the source is entirely fill
N1               4898 src/dps8/dps8_eis.c     for ( ; cpu.du.CHTALLY < min (e -> N1, e -> N2); cpu.du.CHTALLY ++)
N1               4900 src/dps8/dps8_eis.c         word9 c = EISget469 (1, e -> N1 - cpu.du.CHTALLY - 1); // get src char
N1               4962 src/dps8/dps8_eis.c     if (e -> N1 < e -> N2)
N1               4983 src/dps8/dps8_eis.c     if (e -> N1 > e -> N2)
N1               5193 src/dps8/dps8_eis.c     uint N = min (e-> N1, 63);
N1               6715 src/dps8/dps8_eis.c     e->srcTally = (int) e->N1;  // number of chars in src (max 63)
N1               6856 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               6865 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               6869 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               6907 src/dps8/dps8_eis.c     e -> srcTally = (int) e -> N1;  // number of chars in src (max 63)
N1               6952 src/dps8/dps8_eis.c       e->N1, e->N2, e->N3, e->TN1, e->CN1, TA3, e->CN3);
N1               6956 src/dps8/dps8_eis.c       e->N1, e->N2, e->N3, e->TN1, e->CN1, e->TA3, e->CN3);
N1               7157 src/dps8/dps8_eis.c     int lastpageidx = ((int)e->N1 + (int)e->CN1 -1) / e->srcSZ;
N1               7182 src/dps8/dps8_eis.c       fill, fillT, e -> N1, e -> N2);
N1               7184 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               7187 src/dps8/dps8_eis.c     for ( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY ++)
N1               7248 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               7284 src/dps8/dps8_eis.c     if (e->N1 > e->N2)
N1               7359 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               7369 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               7374 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               7659 src/dps8/dps8_eis.c                e->TN1, e->CN1, e->N1, e->TN2, e->CN2, e->N2);
N1               7682 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               7692 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               7697 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               8036 src/dps8/dps8_eis.c                e -> N1, e -> N2,
N1               8047 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               8050 src/dps8/dps8_eis.c     for( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY += 1)
N1               8072 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               8104 src/dps8/dps8_eis.c     if (e->N1 > e->N2)
N1               8289 src/dps8/dps8_eis.c     getBitOffsets((int) e->N1, (int) e->C1, (int) e->B1, &numWords1, &e->ADDR1.cPos, &e->ADDR1.bPos);
N1               8301 src/dps8/dps8_eis.c                e->N1, e->C1, e->B1, numWords1, e->ADDR1.cPos, e->ADDR1.bPos);
N1               8330 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               8333 src/dps8/dps8_eis.c     for( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY += 1)
N1               8353 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               8385 src/dps8/dps8_eis.c     if (e->N1 > e->N2)
N1               8522 src/dps8/dps8_eis.c                e -> N1, e -> N2,
N1               8533 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               8536 src/dps8/dps8_eis.c     for( ; cpu.du.CHTALLY < min (e->N1, e->N2); cpu.du.CHTALLY += 1)
N1               8551 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               8573 src/dps8/dps8_eis.c     if (e->N1 > e->N2)
N1               8676 src/dps8/dps8_eis.c     getBitOffsets((int) e->N1, (int) e->C1, (int) e->B1, &numWords1, &e->ADDR1.cPos, &e->ADDR1.bPos);
N1               8688 src/dps8/dps8_eis.c                e->N1, e->C1, e->B1, numWords1, e->ADDR1.cPos, e->ADDR1.bPos);
N1               8717 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               8720 src/dps8/dps8_eis.c     for( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY += 1)
N1               8737 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               8762 src/dps8/dps8_eis.c     if (e->N1 > e->N2)
N1               8890 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb N1 %d N2 %d\n", e -> N1, e -> N2);
N1               8902 src/dps8/dps8_eis.c 
N1               8908 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               8912 src/dps8/dps8_eis.c     for(i = 0 ; i < min(e->N1, e->N2) ; i += 1)
N1               8931 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               8951 src/dps8/dps8_eis.c     } else if (e->N1 > e->N2)
N1               8953 src/dps8/dps8_eis.c         for(; i < e->N1 ; i += 1)
N1               9534 src/dps8/dps8_eis.c     if (e->N1 == 0 || e->N1 > 8)
N1               9565 src/dps8/dps8_eis.c     load9x((int) e->N1, &e->ADDR1, (int) e->CN1);
N1               9721 src/dps8/dps8_eis.c 
N1               9722 src/dps8/dps8_eis.c 
N1               9797 src/dps8/dps8_eis.c 
N1               9818 src/dps8/dps8_eis.c 
N1               9990 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               9994 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               10021 src/dps8/dps8_eis.c 
N1               10169 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               10179 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               10184 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               10518 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               10528 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               10533 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               10863 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               10873 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               10878 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               11171 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               11181 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               11186 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               11502 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               11512 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               11517 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               11770 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               11780 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               11785 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               12825 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               12835 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               12840 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               12930 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF2 %d NQ %d\n",e->S1,e->S2,e->N1,e->N2,clz1,clz2,op1->exponent,op2->exponent,e->SF2,NQ);
N1               13214 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               13224 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               13229 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               13358 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF3 %d NQ %d\n",e->S1,e->S2,e->N1,e->N2,clz1,clz2,op1->exponent,op2->exponent,e->SF3,NQ);