MR               3197 src/dps8/dps8_cpu.c                     fltAddress = (cpu.MR.FFV & MASK15) << 3;
MR               3616 src/dps8/dps8_cpu.c         if (cpu.MR.sdpap)
MR               3619 src/dps8/dps8_cpu.c             cpu.MR.sdpap = 0;
MR               3621 src/dps8/dps8_cpu.c         if (cpu.MR.separ)
MR               3624 src/dps8/dps8_cpu.c                 cpu.MR.separ = 0;
MR               3695 src/dps8/dps8_cpu.c         if (cpu.MR.sdpap)
MR               3698 src/dps8/dps8_cpu.c             cpu.MR.sdpap = 0;
MR               3700 src/dps8/dps8_cpu.c         if (cpu.MR.separ)
MR               3703 src/dps8/dps8_cpu.c             cpu.MR.separ = 0;
MR               3842 src/dps8/dps8_cpu.c     if (cpu.MR.sdpap) {
MR               3844 src/dps8/dps8_cpu.c       cpu.MR.sdpap = 0;
MR               3846 src/dps8/dps8_cpu.c     if (cpu.MR.separ) {
MR               3848 src/dps8/dps8_cpu.c       cpu.MR.separ = 0;
MR               4282 src/dps8/dps8_cpu.c     if (cpu.MR.hrhlt && cpu.history_cyclic[CU_HIST_REG] == 0)
MR               4285 src/dps8/dps8_cpu.c         if (cpu.MR.ihrrs)
MR               4287 src/dps8/dps8_cpu.c             cpu.MR.ihr = 0;
MR               1578 src/dps8/dps8_cpu.h     mode_register_s MR;
MR               2018 src/dps8/dps8_cpu.h         if (cpu.MR.sdpap)
MR               2021 src/dps8/dps8_cpu.h             cpu.MR.sdpap = 0;
MR               2023 src/dps8/dps8_cpu.h         if (cpu.MR.separ)
MR               2026 src/dps8/dps8_cpu.h             cpu.MR.separ = 0;
MR               2044 src/dps8/dps8_cpu.h         if (cpu.MR.sdpap)
MR               2047 src/dps8/dps8_cpu.h             cpu.MR.sdpap = 0;
MR               2049 src/dps8/dps8_cpu.h         if (cpu.MR.separ)
MR               2052 src/dps8/dps8_cpu.h             cpu.MR.separ = 0;
MR               2085 src/dps8/dps8_cpu.h         if (cpu.MR.sdpap)
MR               2088 src/dps8/dps8_cpu.h             cpu.MR.sdpap = 0;
MR               2090 src/dps8/dps8_cpu.h         if (cpu.MR.separ)
MR               2093 src/dps8/dps8_cpu.h             cpu.MR.separ = 0;
MR                634 src/dps8/dps8_faults.c       if (cpu.MR.emr && cpu.MR.ihrrs)
MR                636 src/dps8/dps8_faults.c           cpu.MR.ihr = 0;
MR                650 src/dps8/dps8_faults.c       if (cpu.MR.emr && cpu.MR.ihrrs)
MR                659 src/dps8/dps8_faults.c               cpu.MR.ihr = 0;
MR                666 src/dps8/dps8_faults.c           cpu.MR.ihr = 0;
MR                813 src/dps8/dps8_faults.c     if (cpu.MR.emr && cpu.MR.ihrrs)
MR                815 src/dps8/dps8_faults.c         cpu.MR.ihr = 0;
MR               1411 src/dps8/dps8_ins.c     if (unlikely (cpu.MR.emr && cpu.MR.OC_TRAP)) {
MR               1412 src/dps8/dps8_ins.c       if (cpu.MR.OPCODE == opcode && cpu.MR.OPCODEX == opcodeX) {
MR               1413 src/dps8/dps8_ins.c         if (cpu.MR.ihrrs) {
MR               1414 src/dps8/dps8_ins.c           cpu.MR.ihr = 0;
MR               2310 src/dps8/dps8_ins.c     memcpy (& cpu.MR_cache, & cpu.MR, sizeof (cpu.MR_cache));
MR               7132 src/dps8/dps8_ins.c                   cpu.MR.r = cpu.CY;
MR               7134 src/dps8/dps8_ins.c                   putbits36_1 (& cpu.MR.r, 32, 0);
MR               7136 src/dps8/dps8_ins.c                   putbits36_2 (& cpu.MR.r, 33, 0);
MR               7138 src/dps8/dps8_ins.c                     cpu.MR.FFV = getbits36_15 (cpu.CY, 0);
MR               7139 src/dps8/dps8_ins.c                     cpu.MR.OC_TRAP = getbits36_1 (cpu.CY, 16);
MR               7140 src/dps8/dps8_ins.c                     cpu.MR.ADR_TRAP = getbits36_1 (cpu.CY, 17);
MR               7141 src/dps8/dps8_ins.c                     cpu.MR.OPCODE = getbits36_9 (cpu.CY, 18);
MR               7142 src/dps8/dps8_ins.c                     cpu.MR.OPCODEX = getbits36_1 (cpu.CY, 27);
MR               7144 src/dps8/dps8_ins.c                   cpu.MR.sdpap = getbits36_1 (cpu.CY, 20);
MR               7145 src/dps8/dps8_ins.c                   cpu.MR.separ = getbits36_1 (cpu.CY, 21);
MR               7146 src/dps8/dps8_ins.c                   cpu.MR.hrhlt = getbits36_1 (cpu.CY, 28);
MR               7147 src/dps8/dps8_ins.c                   DPS8M_ (cpu.MR.hrxfr = getbits36_1 (cpu.CY, 29);)
MR               7148 src/dps8/dps8_ins.c                   cpu.MR.ihr = getbits36_1 (cpu.CY, 30);
MR               7149 src/dps8/dps8_ins.c                   cpu.MR.ihrrs = getbits36_1 (cpu.CY, 31);
MR               7150 src/dps8/dps8_ins.c                   cpu.MR.emr = getbits36_1 (cpu.CY, 35);
MR               7152 src/dps8/dps8_ins.c                     cpu.MR.hexfp = getbits36_1 (cpu.CY, 33);
MR               7154 src/dps8/dps8_ins.c                     cpu.MR.hexfp = 0;
MR               7160 src/dps8/dps8_ins.c                   if (cpu.MR.hrhlt)
MR               7167 src/dps8/dps8_ins.c 
MR               7172 src/dps8/dps8_ins.c 
MR               7370 src/dps8/dps8_ins.c                     cpu.Ypair[0] = cpu.MR.r;
MR               7371 src/dps8/dps8_ins.c                     putbits36_1 (& cpu.Ypair[0], 20, cpu.MR.sdpap);
MR               7372 src/dps8/dps8_ins.c                     putbits36_1 (& cpu.Ypair[0], 21, cpu.MR.separ);
MR               7373 src/dps8/dps8_ins.c                     putbits36_1 (& cpu.Ypair[0], 30, cpu.MR.ihr);
MR               7374 src/dps8/dps8_ins.c                     DPS8M_ (putbits36_1 (& cpu.Ypair[0], 33, cpu.MR.hexfp);)
MR                450 src/dps8/dps8_math.c     return (! cpu.tweaks.l68_mode) && (!! cpu.options.hex_mode_installed) &&  (!! cpu.MR.hexfp) && (!! TST_I_HEX);