init_enable 195 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.init_enable [i]); init_enable 543 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [port_num] = (uint) v; init_enable 638 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [0] = false; init_enable 644 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [1] = false; init_enable 650 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [2] = false; init_enable 656 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [3] = false; init_enable 663 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [4] = false; init_enable 669 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [5] = false; init_enable 675 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [6] = false; init_enable 681 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.init_enable [7] = false; init_enable 840 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 1; init_enable 847 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 0; init_enable 865 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 1; init_enable 872 src/dps8/dps8_cpu.c cpun->switches.init_enable[port_num] = 0; init_enable 715 src/dps8/dps8_cpu.h uint init_enable [N_CPU_PORTS]; init_enable 7869 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [0] & 01LL) init_enable 7880 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [1] & 01LL) init_enable 7891 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [2] & 01LL) init_enable 7902 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [3] & 01LL) init_enable 8092 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [4] & 01LL) init_enable 8103 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [5] & 01LL) init_enable 8114 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [6] & 01LL) init_enable 8125 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.init_enable [7] & 01LL)