w0                159 src/decNumber/decNumberLocal.h     uInt u0, u1, v0, v1, w0, w1, w2, t;      \
w0                162 src/decNumber/decNumberLocal.h     w0=u0*v0;                                \
w0                163 src/decNumber/decNumberLocal.h     t=u1*v0 + (w0>>16);                      \
w0               3947 src/dps8/dps8_cpu.c static void add_history (uint hset, word36 w0, word36 w1)
w0               3951 src/dps8/dps8_cpu.c         cpu.history [hset] [cpu.history_cyclic[hset]] [0] = w0;
w0               3957 src/dps8/dps8_cpu.c void add_history_force (uint hset, word36 w0, word36 w1)
w0               3959 src/dps8/dps8_cpu.c     cpu.history [hset] [cpu.history_cyclic[hset]] [0] = w0;
w0               3978 src/dps8/dps8_cpu.c     word36 w0      = 0, w1 = 0;
w0               3979 src/dps8/dps8_cpu.c     w0            |= flags & 0777777000000;
w0               3980 src/dps8/dps8_cpu.c     w0            |= IWB_IRODD & MASK18;
w0               3984 src/dps8/dps8_cpu.c     add_history (CU_HIST_REG, w0, w1);
w0               3990 src/dps8/dps8_cpu.c     word36 w0  = flags, w1 = 0;
w0               3994 src/dps8/dps8_cpu.c     add_history (DPS8M_DU_OU_HIST_REG, w0, w1);
w0               3999 src/dps8/dps8_cpu.c     word36 w0  = 0, w1 = 0;
w0               4000 src/dps8/dps8_cpu.c     w0        |= (ESN & MASK15) << 21;
w0               4001 src/dps8/dps8_cpu.c     w0        |= flags & MASK21;
w0               4005 src/dps8/dps8_cpu.c     add_history (cpu.tweaks.l68_mode ? L68_APU_HIST_REG : DPS8M_APU_HIST_REG, w0, w1);
w0               4010 src/dps8/dps8_cpu.c     word36 w0  = 0;
w0               4011 src/dps8/dps8_cpu.c     w0        |= (ZCA & MASK18) << 18;
w0               4012 src/dps8/dps8_cpu.c     w0        |= opcode & MASK18;
w0               4013 src/dps8/dps8_cpu.c     add_history (DPS8M_EAPU_HIST_REG, w0, 0);
w0               4066 src/dps8/dps8_cpu.c     word36 w0 = 0, w1 = 0;
w0               4076 src/dps8/dps8_cpu.c     PNL (putbits36_8 (& w0, 0, cpu.prepare_state);)
w0               4078 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 8, cpu.wasXfer);
w0               4080 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 9, cpu.cu.xde);
w0               4082 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 10, cpu.cu.xdo);
w0               4084 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 11, USE_IRODD?1:0);
w0               4086 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 12, cpu.cu.rpt);
w0               4089 src/dps8/dps8_cpu.c     PNL (putbits36_1 (& w0, 14, cpu.AR_F_E);)
w0               4091 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 15, cpu.cycle != INTERRUPT_cycle?1:0);
w0               4093 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 16, cpu.cycle != FAULT_cycle?1:0);
w0               4095 src/dps8/dps8_cpu.c     putbits36_1  (& w0, 17, TSTF (cpu.cu.IR, I_NBAR)?1:0);
w0               4097 src/dps8/dps8_cpu.c     putbits36_18 (& w0, 18, (word18) (IWB_IRODD & MASK18));
w0               4119 src/dps8/dps8_cpu.c     add_history (CU_HIST_REG, w0, w1);
w0               4182 src/dps8/dps8_cpu.c     word36 w0 = 0, w1 = 0;
w0               4186 src/dps8/dps8_cpu.c     PNL (putbits36_9 (& w0,  0,       cpu.ou.RS);)
w0               4189 src/dps8/dps8_cpu.c     putbits36_1 (& w0,       9,       cpu.ou.characterOperandSize ? 1 : 0);
w0               4192 src/dps8/dps8_cpu.c     putbits36_3 (& w0,       10,      cpu.ou.characterOperandOffset);
w0               4195 src/dps8/dps8_cpu.c     putbits36_1 (& w0,       13,      cpu.ou.crflag);
w0               4198 src/dps8/dps8_cpu.c     putbits36_1 (& w0,       14,      cpu.ou.directOperandFlag ? 1 : 0);
w0               4201 src/dps8/dps8_cpu.c     putbits36_2 (& w0,       15,      cpu.ou.eac);
w0               4205 src/dps8/dps8_cpu.c     PNL (putbits36_9 (& w0,  18,      cpu.ou.RS);)
w0               4208 src/dps8/dps8_cpu.c     putbits36_1 (& w0,       27,      cpu.ou.RB1_FULL);
w0               4211 src/dps8/dps8_cpu.c     putbits36_1 (& w0,       28,      cpu.ou.RP_FULL);
w0               4214 src/dps8/dps8_cpu.c     putbits36_1 (& w0,       29,      cpu.ou.RS_FULL);
w0               4217 src/dps8/dps8_cpu.c     putbits36_6 (& w0,       30,      (word6) (cpu.ou.cycle >> 3));
w0               4236 src/dps8/dps8_cpu.c     add_history (L68_OU_HIST_REG, w0, w1);
w0               4291 src/dps8/dps8_cpu.c     word36 w0 = 0, w1 = 0;
w0               4293 src/dps8/dps8_cpu.c     w0 = op; // set 17-24 FDSPTW/.../FAP bits
w0               4296 src/dps8/dps8_cpu.c     putbits36_15 (& w0,      0,  cpu.TPR.TSR);
w0               4298 src/dps8/dps8_cpu.c     PNL (putbits36_1 (& w0,  15, (cpu.apu.state & apu_ESN_SNR) ? 1 : 0);)
w0               4299 src/dps8/dps8_cpu.c     PNL (putbits36_1 (& w0,  16, (cpu.apu.state & apu_ESN_TSR) ? 1 : 0);)
w0               4301 src/dps8/dps8_cpu.c     putbits36_1 (& w0,       25, cpu.cu.SDWAMM);
w0               4303 src/dps8/dps8_cpu.c     putbits36_4 (& w0,       26, (word4) cpu.SDWAMR);
w0               4305 src/dps8/dps8_cpu.c     putbits36_1 (& w0,       30, cpu.cu.PTWAMM);
w0               4307 src/dps8/dps8_cpu.c     putbits36_4 (& w0,       31, (word4) cpu.PTWAMR);
w0               4309 src/dps8/dps8_cpu.c     PNL (putbits36_1 (& w0,  35, (cpu.apu.state & apu_FLT) ? 1 : 0);)
w0               4320 src/dps8/dps8_cpu.c     add_history (L68_APU_HIST_REG, w0, w1);
w0               2380 src/dps8/dps8_cpu.h void add_history_force (uint hset, word36 w0, word36 w1);