N1                572 src/dps8/dps8_cpu.h #define N1  N [0]
N1               3034 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               3037 src/dps8/dps8_eis.c     for (; cpu.du.CHTALLY < min (e->N1, e->N2); cpu.du.CHTALLY ++)
N1               3052 src/dps8/dps8_eis.c     if (e -> N1 < e -> N2)
N1               3069 src/dps8/dps8_eis.c     else if (e->N1 > e->N2)
N1               3071 src/dps8/dps8_eis.c         for ( ; cpu.du.CHTALLY < e->N1; cpu.du.CHTALLY ++)
N1               3243 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               3248 src/dps8/dps8_eis.c     if (e -> N1)
N1               3250 src/dps8/dps8_eis.c         uint limit = e -> N1 - 1;
N1               3429 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               3432 src/dps8/dps8_eis.c     if (e -> N1)
N1               3434 src/dps8/dps8_eis.c         uint limit = e -> N1 - 1;
N1               3600 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               3603 src/dps8/dps8_eis.c     uint limit = e -> N1;
N1               3772 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               3775 src/dps8/dps8_eis.c     uint limit = e -> N1;
N1               3986 src/dps8/dps8_eis.c                "TCT N1 %d\n", e -> N1);
N1               3988 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               3991 src/dps8/dps8_eis.c     for ( ; cpu.du.CHTALLY < e -> N1; cpu.du.CHTALLY ++)
N1               4025 src/dps8/dps8_eis.c     SC_I_TALLY (cpu.du.CHTALLY == e -> N1);
N1               4181 src/dps8/dps8_eis.c                "TCT N1 %d\n", e -> N1);
N1               4183 src/dps8/dps8_eis.c     PNL (L68_ (if (e->N1 < 128)
N1               4186 src/dps8/dps8_eis.c     uint limit = e -> N1;
N1               4221 src/dps8/dps8_eis.c     SC_I_TALLY (cpu.du.CHTALLY == e -> N1);
N1               4421 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               4425 src/dps8/dps8_eis.c     bool ovp = (e -> N1 < e -> N2) && (fill & 0400) && (TA1 == 1) &&
N1               4428 src/dps8/dps8_eis.c     bool ovp = (e -> N1 < e -> N2) && (fill & 0400) && (e -> TA1 == 1) &&
N1               4437 src/dps8/dps8_eis.c     sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR TALLY %u TA1 %u TA2 %u N1 %u N2 %u CN1 %u CN2 %u\n", cpu.du.CHTALLY, TA1, TA2, e -> N1, e -> N2, e -> CN1, e -> CN2);
N1               4439 src/dps8/dps8_eis.c     sim_debug (DBG_TRACEEXT, & cpu_dev, "MLR TALLY %u TA1 %u TA2 %u N1 %u N2 %u CN1 %u CN2 %u\n", cpu.du.CHTALLY, e -> TA1, e -> TA2, e -> N1, e -> N2, e -> CN1, e -> CN2);
N1               4462 src/dps8/dps8_eis.c         (e -> N1 % (PGSZ * 4)) == 0 &&  // a page
N1               4463 src/dps8/dps8_eis.c         e -> N2 == e -> N1 && // the src is the same size as the dest.
N1               4475 src/dps8/dps8_eis.c         while (cpu.du.CHTALLY < e -> N1)
N1               4502 src/dps8/dps8_eis.c         e -> N1 == 0 && // the source is entirely fill
N1               4549 src/dps8/dps8_eis.c         e -> N1 % 4 == 0 &&  // a whole number of words in the src
N1               4550 src/dps8/dps8_eis.c         e -> N2 == e -> N1 && // the src is the same size as the dest.
N1               4579 src/dps8/dps8_eis.c         e -> N1 == 0 && // the source is entirely fill
N1               4599 src/dps8/dps8_eis.c     for ( ; cpu.du.CHTALLY < min (e->N1, e->N2); cpu.du.CHTALLY ++)
N1               4647 src/dps8/dps8_eis.c             if (ovp && (cpu.du.CHTALLY == e -> N1 - 1))
N1               4663 src/dps8/dps8_eis.c     if (e -> N1 < e -> N2)
N1               4682 src/dps8/dps8_eis.c     if (e -> N1 > e -> N2)
N1               4820 src/dps8/dps8_eis.c     bool ovp = (e -> N1 < e -> N2) && (fill & 0400) && (TA1 == 1) &&
N1               4823 src/dps8/dps8_eis.c     bool ovp = (e -> N1 < e -> N2) && (fill & 0400) && (e -> TA1 == 1) &&
N1               4830 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               4844 src/dps8/dps8_eis.c         e -> N1 % 4 == 0 &&  // a whole number of words in the src
N1               4845 src/dps8/dps8_eis.c         e -> N2 == e -> N1 && // the src is the same size as the dest.
N1               4875 src/dps8/dps8_eis.c         e -> N1 == 0 && // the source is entirely fill
N1               4899 src/dps8/dps8_eis.c     for ( ; cpu.du.CHTALLY < min (e -> N1, e -> N2); cpu.du.CHTALLY ++)
N1               4901 src/dps8/dps8_eis.c         word9 c = EISget469 (1, e -> N1 - cpu.du.CHTALLY - 1); // get src char
N1               4963 src/dps8/dps8_eis.c     if (e -> N1 < e -> N2)
N1               4984 src/dps8/dps8_eis.c     if (e -> N1 > e -> N2)
N1               5194 src/dps8/dps8_eis.c     uint N = min (e-> N1, 63);
N1               6716 src/dps8/dps8_eis.c     e->srcTally = (int) e->N1;  // number of chars in src (max 63)
N1               6857 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               6866 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               6870 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               6908 src/dps8/dps8_eis.c     e -> srcTally = (int) e -> N1;  // number of chars in src (max 63)
N1               6953 src/dps8/dps8_eis.c       e->N1, e->N2, e->N3, e->TN1, e->CN1, TA3, e->CN3);
N1               6957 src/dps8/dps8_eis.c       e->N1, e->N2, e->N3, e->TN1, e->CN1, e->TA3, e->CN3);
N1               7158 src/dps8/dps8_eis.c     int lastpageidx = ((int)e->N1 + (int)e->CN1 -1) / e->srcSZ;
N1               7183 src/dps8/dps8_eis.c       fill, fillT, e -> N1, e -> N2);
N1               7185 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               7188 src/dps8/dps8_eis.c     for ( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY ++)
N1               7249 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               7285 src/dps8/dps8_eis.c     if (e->N1 > e->N2)
N1               7360 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               7370 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               7375 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               7660 src/dps8/dps8_eis.c                e->TN1, e->CN1, e->N1, e->TN2, e->CN2, e->N2);
N1               7683 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               7693 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               7698 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               8037 src/dps8/dps8_eis.c                e -> N1, e -> N2,
N1               8048 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               8051 src/dps8/dps8_eis.c     for( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY += 1)
N1               8073 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               8105 src/dps8/dps8_eis.c     if (e->N1 > e->N2)
N1               8290 src/dps8/dps8_eis.c     getBitOffsets((int) e->N1, (int) e->C1, (int) e->B1, &numWords1, &e->ADDR1.cPos, &e->ADDR1.bPos);
N1               8302 src/dps8/dps8_eis.c                e->N1, e->C1, e->B1, numWords1, e->ADDR1.cPos, e->ADDR1.bPos);
N1               8331 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               8334 src/dps8/dps8_eis.c     for( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY += 1)
N1               8354 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               8386 src/dps8/dps8_eis.c     if (e->N1 > e->N2)
N1               8523 src/dps8/dps8_eis.c                e -> N1, e -> N2,
N1               8534 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               8537 src/dps8/dps8_eis.c     for( ; cpu.du.CHTALLY < min (e->N1, e->N2); cpu.du.CHTALLY += 1)
N1               8552 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               8574 src/dps8/dps8_eis.c     if (e->N1 > e->N2)
N1               8677 src/dps8/dps8_eis.c     getBitOffsets((int) e->N1, (int) e->C1, (int) e->B1, &numWords1, &e->ADDR1.cPos, &e->ADDR1.bPos);
N1               8689 src/dps8/dps8_eis.c                e->N1, e->C1, e->B1, numWords1, e->ADDR1.cPos, e->ADDR1.bPos);
N1               8718 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               8721 src/dps8/dps8_eis.c     for( ; cpu.du.CHTALLY < min(e->N1, e->N2); cpu.du.CHTALLY += 1)
N1               8738 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               8763 src/dps8/dps8_eis.c     if (e->N1 > e->N2)
N1               8891 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "cmpb N1 %d N2 %d\n", e -> N1, e -> N2);
N1               8903 src/dps8/dps8_eis.c 
N1               8909 src/dps8/dps8_eis.c     PNL (L68_ (if (max (e->N1, e->N2) < 128)
N1               8913 src/dps8/dps8_eis.c     for(i = 0 ; i < min(e->N1, e->N2) ; i += 1)
N1               8932 src/dps8/dps8_eis.c     if (e->N1 < e->N2)
N1               8952 src/dps8/dps8_eis.c     } else if (e->N1 > e->N2)
N1               8954 src/dps8/dps8_eis.c         for(; i < e->N1 ; i += 1)
N1               9535 src/dps8/dps8_eis.c     if (e->N1 == 0 || e->N1 > 8)
N1               9566 src/dps8/dps8_eis.c     load9x((int) e->N1, &e->ADDR1, (int) e->CN1);
N1               9722 src/dps8/dps8_eis.c 
N1               9723 src/dps8/dps8_eis.c 
N1               9798 src/dps8/dps8_eis.c 
N1               9819 src/dps8/dps8_eis.c 
N1               9991 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               9995 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               10022 src/dps8/dps8_eis.c 
N1               10170 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               10180 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               10185 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               10519 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               10529 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               10534 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               10864 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               10874 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               10879 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               11172 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               11182 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               11187 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               11503 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               11513 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               11518 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               11771 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               11781 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               11786 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               12826 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               12836 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               12841 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               12931 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv2d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF2 %d NQ %d\n",e->S1,e->S2,e->N1,e->N2,clz1,clz2,op1->exponent,op2->exponent,e->SF2,NQ);
N1               13215 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // need to account for the - sign
N1               13225 src/dps8/dps8_eis.c             n1 = (int) e->N1 - 1; // only 1 sign
N1               13230 src/dps8/dps8_eis.c             n1 = (int) e->N1;     // no sign
N1               13359 src/dps8/dps8_eis.c sim_debug (DBG_TRACEEXT, & cpu_dev, "dv3d S1 %d S2 %d N1 %d N2 %d clz1 %d clz2 %d E1 %d E2 %d SF3 %d NQ %d\n",e->S1,e->S2,e->N1,e->N2,clz1,clz2,op1->exponent,op2->exponent,e->SF3,NQ);