MFk 1180 src/dps8/dps8_eis.c word18 MFk = e -> MF [k - 1]; MFk 1182 src/dps8/dps8_eis.c if (MFk & MFkID) MFk 1337 src/dps8/dps8_eis.c word18 MFk = e -> MF [k - 1]; MFk 1410 src/dps8/dps8_eis.c if (MFk & MFkAR) MFk 1438 src/dps8/dps8_eis.c if (MFk & MFkRL) MFk 1473 src/dps8/dps8_eis.c word36 r = getMFReg36 (MFk & 017, allowDU, true, mod_fault); // allow du based on instruction, allow n,ic MFk 1475 src/dps8/dps8_eis.c if ((MFk & 017) == 4) // reg == IC ? MFk 1657 src/dps8/dps8_eis.c word18 MFk = e->MF[k-1]; MFk 1667 src/dps8/dps8_eis.c if (MFk & MFkAR) MFk 1712 src/dps8/dps8_eis.c if (MFk & MFkRL) MFk 1722 src/dps8/dps8_eis.c word36 r = getMFReg36(MFk & 017, false, true, mod_fault); // disallow du, allow n, ic MFk 1723 src/dps8/dps8_eis.c if ((MFk & 017) == 4) // reg == IC ? MFk 1835 src/dps8/dps8_eis.c word18 MFk = e->MF[k-1]; MFk 1848 src/dps8/dps8_eis.c if (MFk & MFkAR) MFk 1874 src/dps8/dps8_eis.c if (MFk & MFkRL) MFk 1897 src/dps8/dps8_eis.c word36 r = getMFReg36(MFk & 017, false, true, mod_fault); // disallow du, allow n,ic MFk 1898 src/dps8/dps8_eis.c if ((MFk & 017) == 4) // reg == IC ?