interlace 153 src/dps8/dps8_cpu.c 'A' + i, cpus[cpu_unit_idx].switches.interlace [i]); interlace 493 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [port_num] = (uint) v; interlace 590 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [0] = false; interlace 596 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [1] = false; interlace 602 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [2] = false; interlace 608 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [3] = false; interlace 615 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [4] = false; interlace 621 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [5] = false; interlace 627 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [6] = false; interlace 633 src/dps8/dps8_cpu.c cpus[cpu_unit_idx].switches.interlace [7] = false; interlace 791 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 798 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 816 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 823 src/dps8/dps8_cpu.c cpun->switches.interlace[port_num] = 0; interlace 714 src/dps8/dps8_cpu.h uint interlace [N_CPU_PORTS]; // 0/2/4 interlace 7849 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] ? 1LL:0LL) interlace 7860 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] ? 1LL:0LL) interlace 7871 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] ? 1LL:0LL) interlace 7882 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] ? 1LL:0LL) interlace 7957 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[0] == 2 ? interlace 7959 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[1] == 2 ? interlace 7961 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[2] == 2 ? interlace 7963 src/dps8/dps8_ins.c cpu.rA |= (word36) ((cpu.switches.interlace[3] == 2 ? interlace 8072 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] ? 1LL:0LL) interlace 8083 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] ? 1LL:0LL) interlace 8094 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] ? 1LL:0LL) interlace 8105 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] ? 1LL:0LL) interlace 8128 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [0] == 2 ? interlace 8130 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [1] == 2 ? interlace 8132 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [2] == 2 ? interlace 8134 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [3] == 2 ? interlace 8137 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [4] == 2 ? interlace 8139 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [5] == 2 ? interlace 8141 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [6] == 2 ? interlace 8143 src/dps8/dps8_ins.c cpu.rA |= (word36) (cpu.switches.interlace [7] == 2 ? interlace 598 src/dps8/dps8_scu.c uint interlace; // 1 bit interlace 677 src/dps8/dps8_scu.c sim_printf("Interlace: %o\n", scup -> interlace); interlace 923 src/dps8/dps8_scu.c sw -> interlace = (uint) v; interlace 1124 src/dps8/dps8_scu.c up -> interlace = sw -> interlace; interlace 1723 src/dps8/dps8_scu.c up -> interlace = (rega >> 5) & 1; interlace 2034 src/dps8/dps8_scu.c putbits36_1 (& a, 30, (word1) up -> interlace); interlace 52 src/dps8/dps8_scu.h uint interlace; // 1 bit