cycle2           4176 src/dps8/dps8_cpu.c     PNL (add_history (L68_DU_HIST_REG, cpu.du.cycle1, cpu.du.cycle2);)
cycle2           1195 src/dps8/dps8_cpu.h #define DU_CYCLE_GDLDA { clrmask (& cpu.du.cycle2, du2_nGDLDA);               \
cycle2           1196 src/dps8/dps8_cpu.h                         setmask (& cpu.du.cycle2, du2_nGDLDB | du2_nGDLDC); }
cycle2           1197 src/dps8/dps8_cpu.h #define DU_CYCLE_GDLDB { clrmask (& cpu.du.cycle2, du2_nGDLDB);               \
cycle2           1198 src/dps8/dps8_cpu.h                         setmask (& cpu.du.cycle2, du2_nGDLDA | du2_nGDLDC); }
cycle2           1199 src/dps8/dps8_cpu.h #define DU_CYCLE_GDLDC { clrmask (& cpu.du.cycle2, du2_nGDLDC);               \
cycle2           1200 src/dps8/dps8_cpu.h                         setmask (& cpu.du.cycle2, du2_nGDLDA | du2_nGDLDB); }
cycle2           1204 src/dps8/dps8_cpu.h #define DU_CYCLE_ANLD1     setmask (& cpu.du.cycle2, du2_ANLD1)
cycle2           1205 src/dps8/dps8_cpu.h #define DU_CYCLE_ANLD2     setmask (& cpu.du.cycle2, du2_ANLD2)
cycle2           1206 src/dps8/dps8_cpu.h #define DU_CYCLE_NLD1      setmask (& cpu.du.cycle2, du2_NLD1)
cycle2           1207 src/dps8/dps8_cpu.h #define DU_CYCLE_NLD2      setmask (& cpu.du.cycle2, du2_NLD2)
cycle2           1208 src/dps8/dps8_cpu.h #define DU_CYCLE_FRND      setmask (& cpu.du.cycle2, du2_FRND)
cycle2           1209 src/dps8/dps8_cpu.h #define DU_CYCLE_DGBD      setmask (& cpu.du.cycle2, du2_DGBD)
cycle2           1210 src/dps8/dps8_cpu.h #define DU_CYCLE_DGDB      setmask (& cpu.du.cycle2, du2_DGDB)
cycle2           1214 src/dps8/dps8_cpu.h #define DU_CYCLE_LDWRT1    setmask (& cpu.du.cycle2, du2_LDWRT1)
cycle2           1215 src/dps8/dps8_cpu.h #define DU_CYCLE_LDWRT2    setmask (& cpu.du.cycle2, du2_LDWRT2)
cycle2           1216 src/dps8/dps8_cpu.h #define DU_CYCLE_FEXOP     setmask (& cpu.du.cycle2, du2_FEXOP)
cycle2           1217 src/dps8/dps8_cpu.h #define DU_CYCLE_ANSTR     setmask (& cpu.du.cycle2, du2_ANSTR)
cycle2           1218 src/dps8/dps8_cpu.h #define DU_CYCLE_GSTR      setmask (& cpu.du.cycle2, du2_GSTR)
cycle2           1219 src/dps8/dps8_cpu.h #define DU_CYCLE_FLEN_128  clrmask (& cpu.du.cycle2, du2_nFLEN_128)
cycle2           1243 src/dps8/dps8_cpu.h                     cpu.du.cycle2 =      \
cycle2           1252 src/dps8/dps8_cpu.h #define DU_CYCLE_nDUD clrmask (& cpu.du.cycle2, du2_DUD)
cycle2           1492 src/dps8/dps8_cpu.h     word37 cycle2;