csh1_on           407 src/dps8/dps8_cpu.h     word1    csh1_on; // 1: The lower half of the cache memory is active and
csh1_on          7088 src/dps8/dps8_ins.c                   uint csh1_on    = getbits36_1 (cpu.CY, 54 - 36);
csh1_on          7092 src/dps8/dps8_ins.c                   cpu.CMR.csh1_on = (word1) csh1_on;
csh1_on          7361 src/dps8/dps8_ins.c                     putbits36_1 (& cpu.Ypair[1], 54 - 36, cpu.CMR.csh1_on);