cpus              404 src/dps8/dps8_cable.c         cpus[cpu_unit_idx].scu_port[scu_unit_idx]                       = scu_port_num;
cpus              137 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.FLT_BASE);
cpus              139 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.cpu_num);
cpus              141 src/dps8/dps8_cpu.c                 (unsigned long long)cpus[cpu_unit_idx].switches.data_switches);
cpus              143 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.addr_switches);
cpus              144 src/dps8/dps8_cpu.c     for (int i = 0; i < (cpus[cpu_unit_idx].tweaks.l68_mode ? N_L68_CPU_PORTS : N_DPS8M_CPU_PORTS); i ++)
cpus              147 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.enable [i]);
cpus              149 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.init_enable [i]);
cpus              151 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.assignment [i]);
cpus              153 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.interlace [i]);
cpus              155 src/dps8/dps8_cpu.c                     'A' + i, cpus[cpu_unit_idx].switches.store_size [i]);
cpus              158 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.procMode == procModeMultics ? "Multics" : cpus[cpu_unit_idx].switches.procMode == procModeGCOS ? "GCOS" : "???",
cpus              159 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.procMode);
cpus              161 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable_cache ? "Enabled" : "Disabled");
cpus              163 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.sdwam_enable ? "Enabled" : "Disabled");
cpus              165 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.ptwam_enable ? "Enabled" : "Disabled");
cpus              168 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].options.proc_speed);
cpus              170 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.dis_enable);
cpus              174 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.halt_on_unimp);
cpus              176 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.enable_wam);
cpus              178 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.report_faults);
cpus              180 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.tro_enable);
cpus              184 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.drl_fatal);
cpus              186 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.useMap);
cpus              188 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].options.prom_installed);
cpus              190 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].options.hex_mode_installed);
cpus              192 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].options.cache_installed);
cpus              194 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].options.clock_slave_installed);
cpus              196 src/dps8/dps8_cpu.c     if (cpus[cpu_unit_idx].set_affinity)
cpus              197 src/dps8/dps8_cpu.c       sim_msg ("CPU affinity:                 %d\n", cpus[cpu_unit_idx].affinity);
cpus              201 src/dps8/dps8_cpu.c     sim_msg ("ISOLTS mode:                  %01o(8)\n", cpus[cpu_unit_idx].tweaks.isolts_mode);
cpus              202 src/dps8/dps8_cpu.c     sim_msg ("NODIS mode:                   %01o(8)\n", cpus[cpu_unit_idx].tweaks.nodis);
cpus              203 src/dps8/dps8_cpu.c     sim_msg ("6180 mode:                    %01o(8) [%s]\n", cpus[cpu_unit_idx].tweaks.l68_mode, cpus[cpu_unit_idx].tweaks.l68_mode ? "6180" : "DPS8/M");
cpus              457 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.FLT_BASE = (uint) v;
cpus              459 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.cpu_num = (uint) v;
cpus              461 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.data_switches = (word36) v;
cpus              475 src/dps8/dps8_cpu.c             cpus[cpu_unit_idx].switches.data_switches = d;
cpus              478 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.addr_switches = (word18) v;
cpus              480 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.procMode = v ? procModeMultics : procModeGCOS;
cpus              482 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].options.proc_speed = (uint) v;
cpus              484 src/dps8/dps8_cpu.c           if ((! cpus[cpu_unit_idx].tweaks.l68_mode) && (int) v > 4) {
cpus              491 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.assignment [port_num] = (uint) v;
cpus              493 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.interlace [port_num] = (uint) v;
cpus              495 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.enable [port_num] = (uint) v;
cpus              497 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.init_enable [port_num] = (uint) v;
cpus              500 src/dps8/dps8_cpu.c             if (cpus[cpu_unit_idx].tweaks.l68_mode) {
cpus              524 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.store_size [port_num] = (uint) v;
cpus              527 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.enable_cache = (uint) v ? true : false;
cpus              529 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.sdwam_enable = (uint) v ? true : false;
cpus              531 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].switches.ptwam_enable = (uint) v ? true : false;
cpus              533 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.dis_enable = (uint) v;
cpus              537 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.halt_on_unimp = (uint) v;
cpus              539 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.enable_wam = (uint) v;
cpus              541 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.report_faults = (uint) v;
cpus              543 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.tro_enable = (uint) v;
cpus              547 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.drl_fatal = (uint) v;
cpus              549 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.useMap = v;
cpus              551 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].options.prom_installed = v;
cpus              553 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].options.hex_mode_installed = v;
cpus              555 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].options.cache_installed = v;
cpus              557 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].options.clock_slave_installed = v;
cpus              559 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.enable_emcall = v;
cpus              564 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].set_affinity = false;
cpus              568 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].set_affinity = true;
cpus              569 src/dps8/dps8_cpu.c               cpus[cpu_unit_idx].affinity = (uint) v;
cpus              574 src/dps8/dps8_cpu.c             cpus[cpu_unit_idx].tweaks.isolts_mode = v;
cpus              578 src/dps8/dps8_cpu.c                 if (cpus[cpu_unit_idx].tweaks.l68_mode) // L68
cpus              582 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].isolts_switches_save     = cpus[cpu_unit_idx].switches;
cpus              583 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].isolts_switches_saved    = true;
cpus              585 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.data_switches   = 00000030714000;
cpus              586 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.addr_switches   = 0100150;
cpus              587 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.useMap            = true;
cpus              588 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].tweaks.enable_wam        = true;
cpus              589 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.assignment  [0] = 0;
cpus              590 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.interlace   [0] = false;
cpus              591 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [0] = false;
cpus              592 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.init_enable [0] = false;
cpus              593 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.store_size  [0] = store_sz;
cpus              595 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.assignment  [1] = 0;
cpus              596 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.interlace   [1] = false;
cpus              597 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [1] = true;
cpus              598 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.init_enable [1] = false;
cpus              599 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.store_size  [1] = store_sz;
cpus              601 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.assignment  [2] = 0;
cpus              602 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.interlace   [2] = false;
cpus              603 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [2] = false;
cpus              604 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.init_enable [2] = false;
cpus              605 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.store_size  [2] = store_sz;
cpus              607 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.assignment  [3] = 0;
cpus              608 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.interlace   [3] = false;
cpus              609 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [3] = false;
cpus              610 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.init_enable [3] = false;
cpus              611 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.store_size  [3] = store_sz;
cpus              613 src/dps8/dps8_cpu.c                 if (cpus[cpu_unit_idx].tweaks.l68_mode) { // L68
cpus              614 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.assignment  [4] = 0;
cpus              615 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.interlace   [4] = false;
cpus              616 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.enable      [4] = false;
cpus              617 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.init_enable [4] = false;
cpus              618 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.store_size  [4] = 3;
cpus              620 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.assignment  [5] = 0;
cpus              621 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.interlace   [5] = false;
cpus              622 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.enable      [5] = false;
cpus              623 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.init_enable [5] = false;
cpus              624 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.store_size  [5] = 3;
cpus              626 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.assignment  [6] = 0;
cpus              627 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.interlace   [6] = false;
cpus              628 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.enable      [6] = false;
cpus              629 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.init_enable [6] = false;
cpus              630 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.store_size  [6] = 3;
cpus              632 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.assignment  [7] = 0;
cpus              633 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.interlace   [7] = false;
cpus              634 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.enable      [7] = false;
cpus              635 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.init_enable [7] = false;
cpus              636 src/dps8/dps8_cpu.c                   cpus[cpu_unit_idx].switches.store_size  [7] = 3;
cpus              640 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches.enable      [1] = true;
cpus              644 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].switches = cpus[cpu_unit_idx].isolts_switches_save;
cpus              645 src/dps8/dps8_cpu.c                 cpus[cpu_unit_idx].isolts_switches_saved    = false;
cpus              652 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.nodis = v;
cpus              654 src/dps8/dps8_cpu.c           cpus[cpu_unit_idx].tweaks.l68_mode= v;
cpus              785 src/dps8/dps8_cpu.c   cpu_state_t * cpun = cpus + cpuUnitIdx;
cpus              810 src/dps8/dps8_cpu.c   cpu_state_t * cpun = cpus + cpuUnitIdx;
cpus              878 src/dps8/dps8_cpu.c     cpup = & cpus [current_running_cpu_idx];
cpus              959 src/dps8/dps8_cpu.c     cpu_state_t * cpun = cpus + cpu_unit_idx;
cpus             1387 src/dps8/dps8_cpu.c                 cpus[cpun].switches.serno = sn;
cpus             1391 src/dps8/dps8_cpu.c                                      sim_name, cpun, cpus[cpun].switches.serno);
cpus             1436 src/dps8/dps8_cpu.c             sim_msg (" %9lld\r\n", (long long int) cpus[i].instrCnt);
cpus             1438 src/dps8/dps8_cpu.c             sim_msg (" %'9lld\r\n", (long long int) cpus[i].instrCnt);
cpus             1440 src/dps8/dps8_cpu.c             cpus[i].instrCnt = 0;
cpus             1505 src/dps8/dps8_cpu.c     cpus = system_state->cpus;
cpus             1514 src/dps8/dps8_cpu.c     memset (cpus, 0, sizeof (cpu_state_t) * N_CPU_UNITS_MAX);
cpus             1515 src/dps8/dps8_cpu.c     cpus [0].switches.FLT_BASE = 2; // Some of the UnitTests assume this
cpus             1606 src/dps8/dps8_cpu.c     { ORDATA (IC, cpus[0].PPR.IC, VASIZE), 0, 0, 0 },
cpus             1666 src/dps8/dps8_cpu.c cpu_state_t * cpus = NULL;
cpus             1668 src/dps8/dps8_cpu.c cpu_state_t cpus [N_CPU_UNITS_MAX];
cpus             2101 src/dps8/dps8_cpu.c     cpus [0].PPR.IC = dummy_IC;
cpus             4482 src/dps8/dps8_cpu.c   putbits36_1 (& rsw2,  20,  cpus[cpuNo].options.cache_installed ? 1 : 0);
cpus             4492 src/dps8/dps8_cpu.c   putbits36_4 (& rsw2,  29,  cpus[cpuNo].options.proc_speed & 017LL);
cpus             4494 src/dps8/dps8_cpu.c   putbits36_3 (& rsw2,  33,  cpus[cpuNo].switches.cpu_num & 07LL);
cpus             4497 src/dps8/dps8_cpu.c   if (cpus[cpuNo].options.hex_mode_installed)
cpus             4499 src/dps8/dps8_cpu.c   if (cpus[cpuNo].options.clock_slave_installed)
cpus             4504 src/dps8/dps8_cpu.c   sprintf (serial, "%-11u", cpus[cpuNo].switches.serno);
cpus             1917 src/dps8/dps8_cpu.h extern cpu_state_t * cpus;
cpus             1919 src/dps8/dps8_cpu.h extern cpu_state_t cpus [N_CPU_UNITS_MAX];
cpus              897 src/dps8/dps8_faults.c     cpus[cpuNo].g7FaultsPreset |= (1u << faultNo);
cpus              899 src/dps8/dps8_faults.c     cpus[cpuNo].g7SubFaults [faultNo] = subFault;
cpus             1378 src/dps8/dps8_scu.c         cpus[cpun].events.XIP[scu_unit_idx] = false;
cpus             1434 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true;
cpus             1448 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].isRunning = true;
cpus             1450 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true;
cpus             1501 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true;
cpus             1515 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].isRunning = true;
cpus             1517 src/dps8/dps8_scu.c                 cpus[cpu_unit_udx].events.XIP[scu_unit_idx] = true;
cpus             2445 src/dps8/dps8_scu.c                 cpus[current_running_cpu_idx].scu_port[scu_unit_idx] != port)
cpus               89 src/dps8/dps8_state.h   cpu_state_t cpus [N_CPU_UNITS_MAX];
cpus             4077 src/dps8/dps8_sys.c     { "cpus[]",                 SYM_STATE_OFFSET,  SYM_ARRAY,     offsetof (struct system_state_s, cpus) },
cpus              465 src/dps8/segldr.c     cpus[0].tweaks.enable_emcall = 1;
cpus              523 src/dps8/threadz.c     if (cpus[cpuNum].set_affinity)
cpus              527 src/dps8/threadz.c         CPU_SET (cpus[cpuNum].affinity, & cpuset);
cpus              531 src/dps8/threadz.c                       cpus[cpuNum].affinity, cpuNum, s);