cpun              785 src/dps8/dps8_cpu.c   cpu_state_t * cpun = cpus + cpuUnitIdx;
cpun              787 src/dps8/dps8_cpu.c   cpun->tweaks.l68_mode = 1;
cpun              788 src/dps8/dps8_cpu.c   cpun->options.hex_mode_installed = 0;
cpun              790 src/dps8/dps8_cpu.c     cpun->switches.assignment[port_num] = port_num;
cpun              791 src/dps8/dps8_cpu.c     cpun->switches.interlace[port_num] = 0;
cpun              792 src/dps8/dps8_cpu.c     cpun->switches.store_size[port_num] = 2;
cpun              793 src/dps8/dps8_cpu.c     cpun->switches.enable[port_num] = 1;
cpun              794 src/dps8/dps8_cpu.c     cpun->switches.init_enable[port_num] = 1;
cpun              797 src/dps8/dps8_cpu.c     cpun->switches.assignment[port_num] = 0;
cpun              798 src/dps8/dps8_cpu.c     cpun->switches.interlace[port_num] = 0;
cpun              799 src/dps8/dps8_cpu.c     cpun->switches.store_size[port_num] = 0;
cpun              800 src/dps8/dps8_cpu.c     cpun->switches.enable[port_num] = 0;
cpun              801 src/dps8/dps8_cpu.c     cpun->switches.init_enable[port_num] = 0;
cpun              810 src/dps8/dps8_cpu.c   cpu_state_t * cpun = cpus + cpuUnitIdx;
cpun              812 src/dps8/dps8_cpu.c   cpun->tweaks.l68_mode = 0;
cpun              813 src/dps8/dps8_cpu.c   cpun->options.hex_mode_installed = 0;
cpun              815 src/dps8/dps8_cpu.c     cpun->switches.assignment[port_num] = port_num;
cpun              816 src/dps8/dps8_cpu.c     cpun->switches.interlace[port_num] = 0;
cpun              817 src/dps8/dps8_cpu.c     cpun->switches.store_size[port_num] = 7;
cpun              818 src/dps8/dps8_cpu.c     cpun->switches.enable[port_num] = 1;
cpun              819 src/dps8/dps8_cpu.c     cpun->switches.init_enable[port_num] = 1;
cpun              822 src/dps8/dps8_cpu.c     cpun->switches.assignment[port_num] = 0;
cpun              823 src/dps8/dps8_cpu.c     cpun->switches.interlace[port_num] = 0;
cpun              824 src/dps8/dps8_cpu.c     cpun->switches.store_size[port_num] = 0;
cpun              825 src/dps8/dps8_cpu.c     cpun->switches.enable[port_num] = 0;
cpun              826 src/dps8/dps8_cpu.c     cpun->switches.init_enable[port_num] = 0;
cpun              882 src/dps8/dps8_cpu.c void cpu_reset_unit_idx (UNUSED uint cpun, bool clear_mem)
cpun              884 src/dps8/dps8_cpu.c     uint save = set_cpu_idx (cpun);
cpun              959 src/dps8/dps8_cpu.c     cpu_state_t * cpun = cpus + cpu_unit_idx;
cpun              960 src/dps8/dps8_cpu.c     if (cpun->tweaks.isolts_mode)
cpun              963 src/dps8/dps8_cpu.c         if (cpun->tweaks.useMap)
cpun              967 src/dps8/dps8_cpu.c                 int base = cpun->sc_addr_map [pgnum];
cpun             1374 src/dps8/dps8_cpu.c         uint cpun, sn;
cpun             1383 src/dps8/dps8_cpu.c         else if (sscanf (buffer, "sn%u: %u", & cpun, & sn) == 2)
cpun             1385 src/dps8/dps8_cpu.c             if (cpun < N_CPU_UNITS_MAX)
cpun             1387 src/dps8/dps8_cpu.c                 cpus[cpun].switches.serno = sn;
cpun             1391 src/dps8/dps8_cpu.c                                      sim_name, cpun, cpus[cpun].switches.serno);
cpun             2387 src/dps8/dps8_cpu.h void cpu_reset_unit_idx (UNUSED uint cpun, bool clear_mem);
cpun             1376 src/dps8/dps8_scu.c     for (uint cpun = 0; cpun < cpu_dev.numunits; cpun ++)
cpun             1378 src/dps8/dps8_scu.c         cpus[cpun].events.XIP[scu_unit_idx] = false;